• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Cadence Blogs

Stay up to date with our latest corporate and technology blog posts

Explore the Cadence Forums to find and exchange in-depth technical information.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

    Popular Search: Corporate NewsArtificial IntelligencePCB DesignCFD

Featured

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
Corporate 8 Oct 2025 • 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか?」をテーマに、本田技術研究所社 先進技術研究所(HGRX)との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
Cadence Japan 8 Oct 2025 • less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
Sheryl G 7 Oct 2025 • 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
Corporate 2 Oct 2025 • 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
cdns - all_blogs_categories

  • All 6084
  • Corporate News 202
  • Life at Cadence 200
  • Academic Network 166
  • Analog/Custom Design 765
  • Artificial Intelligence 23
  • Cloud 16
  • Computational Fluid Dynamics 362
  • Data Center 40
  • Digital Design 428
  • Learning and Support 55
  • RF Engineering 114
  • SoC and IP 415
  • System, PCB, & Package Design  986
  • Verification 1286
  • Cadence Japan 4

  • CFD(数値流体力学) 45
  • 中文技术专区 15
  • カスタムIC/ミックスシグナル 188
  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 44
  • Spotlight Taiwan 61
  • The India Circuit 89
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List

Latest blogs

System, PCB, & Package Design 

Why SerDes Signaling Is Trending Towards PAM Encoded Signals

What’s the difference between NRZ, PAM-3 and PAM-4? Here are three graphs that clearly…

Sigrity 16 Nov 2016 • 2 min read
Serial link analysis , PAM-4 , Sigrity , PAM-3

Breakfast Bytes

Jürgen Went From Mobile to Automotive—What Did He Find?

After ARM on the first day, the keynote on the second day of DVCon was by NXP. For…

Paul McLellan 16 Nov 2016 • 8 min read
Automotive , NXP , DVcon , ARM , Breakfast Bytes , verification

Whiteboard Wednesdays

Whiteboard Wednesdays - MIPI Alliance Interfaces

In this week's Whiteboard Wednesdays video, Moshik Rubin takes a closer look at the…

References4U 15 Nov 2016 • less than a min read
Whiteboard Wednesdays , MIPI , MIPI protocols , DSI , CSI2

Breakfast Bytes

What Is the ARM ARM?

The first ARM is the ARM we all know, Advanced RISC Machines (the A originally stood…

Paul McLellan 15 Nov 2016 • 5 min read
Jasper User Group , JUG , Jasper , ARM , JasperGold , arm arm , Breakfast Bytes , Formal verification

Breakfast Bytes

Red Hat's Mr. ARM Talks Open Source

Jon Masters is in an odd position—he is the chief ARM architect at Red Hat. Since…

Paul McLellan 14 Nov 2016 • 8 min read
open source hardware , arm servers , red hat , open source software , open source , jon masters , linux , Breakfast Bytes

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? Tabbed Routing - The Next Generation High Speed…

Improve Route Channel Utilization with Tabbed Routing Tabbed routing is a new…

MaritaB 11 Nov 2016 • 2 min read
Routing , high-speed , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Breakfast Bytes

Optimizing Power with Palladium

At TSMC's OIP Ecosystem Symposium, Cadence's Frank Schirrmeister presented on Software…

Paul McLellan 11 Nov 2016 • 4 min read
palladium z1 , Dynamic Power Analysis , TSMC , TSMC OIP , Incisive , power , Breakfast Bytes

Breakfast Bytes

What Is Automotive Tool Confidence Level 1?

ISO 26262 is the functional safety standard for automotive, as you probably already…

Paul McLellan 10 Nov 2016 • 4 min read
tcl1 , tool confidence level , ISO 26262 , Breakfast Bytes , tcl

Breakfast Bytes

What's For Breakfast? Video Preview November 14th to 18th

https://youtu.be/OQ1c30nbD0s Monday: Red Hat's Jon Masters talks about ARM…

Paul McLellan 9 Nov 2016 • less than a min read
Automotive , ARM Techcon , Jasper User Group , risc-v , NXP , jasper gold , JUG , formal , risc-v foundation , google , red hat , Jasper , open source , mobile , ISO 26262 , ARM , linux , Formal verification , verification

Breakfast Bytes

Moore and Medical at ARM TechCon

The second keynote on the first day of ARM TechCon was a double act with Greg Yeric…

Paul McLellan 9 Nov 2016 • 7 min read
security , greg yeric , ARM Techcon , IoT , 28nm , 3nm , 5nm7nm , Mike Muller , medical , moore's law , privacy , ARM , Breakfast Bytes , 2nm

Whiteboard Wednesdays

Whiteboard Wednesdays - Industry Trends and Requirements for Autonomous Driving

In this week's Whiteboard Wednesdays video, the first in a three part series focusing…

References4U 8 Nov 2016 • less than a min read
Automotive , Whiteboard Wednesdays , functional safety , automotive electronics

Breakfast Bytes

Who Wrote the Book on Formal Verification?

Who wrote the book on formal verification? Depending on whether you want to take…

Paul McLellan 8 Nov 2016 • 5 min read
Intel , Jasper User Group , JUG , formal , CDC , Jasper , property checking , Equivalence Checking , jug 2016 , clock domain crossing , ARM , Breakfast Bytes , Formal verification , verification

Analog/Custom Design

Virtuoso Video Diary: I Am Not Promoting Layout Hierarchy Manipulation!

Are you contemplating manipulating your layout hierarchy by adding or removing a…

Rishu Misri Jaggi 7 Nov 2016 • 5 min read
Flatten , Transparent instances , Virtuoso Video Diary , Connectivity-driven , Make Cell , XL-compliance , Layout hierarchy manipulation , Custom IC Design , Virtuoso Layout Suite XL

Breakfast Bytes

The Amazing Raspberry Pi Story

Eben Upton gave a spellbinding keynote at ARM TechCon on the history of Raspberry…

Paul McLellan 7 Nov 2016 • 9 min read
BBC , Raspberry Pi , Cambridge , acorn , british broadcasting corporation , ARM , Breakfast Bytes

Breakfast Bytes

Automotive Security: A Hacker's Eye View

Charlie Miller gave a keynote at ARM TechCon on automotive security. He is regarded…

Paul McLellan 4 Nov 2016 • 8 min read
security , Automotive , onstar , uber , jeep , chris valasek , charlie miller , tesla , wired magazine , Breakfast Bytes

Verification

Analog Devices Promotes Portable Stimulus at DVClub

If you’re not familiar with the series of DVClub events held in North American, Europe…

tomacadence 3 Nov 2016 • 3 min read
Analog Devices. ADI , pswg , cadence , debug , System Design and Verification , Dave Brownell , software , Accellera , System Design & Verification , portable stimulus , System Design and Verification , verification

Breakfast Bytes

What's For Breakfast? Video Preview November 7th to 11th

https://youtu.be/n4jz8shM1hM Monday: The amazing story of Raspberry Pi as…

Paul McLellan 3 Nov 2016 • less than a min read
security , Automotive , greg yeric , ARM Techcon , Jasper User Group , Low Power , trustzone , Raspberry Pi , jasper gold , palladium z1 , eben upton , JUG , IoT , tcl1 , Palladium , Jasper , Mike Muller , medical , Internet of Things , Power Analysis , ISO 26262 , ARM , Formal verification

System, PCB, & Package Design 

How to Address the Challenges of Serial Link Design and Analysis

What is a serial link? It's an interface where data is serialized for high-speed…

Sigrity 3 Nov 2016 • 3 min read
Serial link analysis , PCB , SI , IBIS-AMI , Signal Integrity , Sigrity , High Speed design , Allegro

Breakfast Bytes

Automotive Is a Pot of Gold Guarded by a Dragon

One of the big themes of pretty much any conference on semiconductors these days…

Paul McLellan 3 Nov 2016 • 6 min read
Automotive , functional safety , tool confidence level , DVcon , DVCon Europe , ISO 26262 , optima , Breakfast Bytes
<>
CDNS - Fix Layout Hompage

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information