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Featured

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
Corporate 8 Oct 2025 • 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか?」をテーマに、本田技術研究所社 先進技術研究所(HGRX)との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
Cadence Japan 8 Oct 2025 • less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
Sheryl G 7 Oct 2025 • 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
Corporate 2 Oct 2025 • 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
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Blog - Post List

Latest blogs

Whiteboard Wednesdays

Whiteboard Wednesdays - Optimized FFTs on the Tensilica ConnX BBE32EP DSP

Fast Fourier transform (FFT) is a key kernel in almost all DSP applications, and…

References4U 2 Nov 2016 • less than a min read
DSP , Whiteboard Wednesdays , baseband , ConnX , radar , Tensilica , signal processing , FFT

Verification

Genie in a Mouse Click: Indago Protocol Debug App

Do you remember what life was like before the internet and smart phones? If you wanted…

Priyab 2 Nov 2016 • 4 min read
Productivity Tool , Verification IP , and Verification IP' , VIP , Indago Protocol Debug App , design , 'Tensilica

Breakfast Bytes

Wave Computing: a Dataflow Processor for Deep Learning

On the first day of the Linley Processor conference someone told me that he was really…

Paul McLellan 2 Nov 2016 • 4 min read
deep learning , tpu , wave computing , DPU , tensor flow , dataflow computing , Breakfast Bytes , dataflow processor

Breakfast Bytes

Segars and Son

When I was growing up, there was a TV show in the UK called Steptoe and Son, and…

Paul McLellan 1 Nov 2016 • 5 min read
ARM Techcon , Simon Segars , IoT , masayoshi son , Internet of Things , arm holdings , ARM , Breakfast Bytes

Academic Network

Students from Tsinghua University Visit Cadence Beijing

On October 20, 2016, 12 Masters and Ph.D. students mostly from Institute of Microelectronics…

Tracy Zhu 31 Oct 2016 • less than a min read
Cadence Academic Network

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? Arc-aware routing with enhanced contour hug saves…

Enhanced Contour Routing is a new prototype feature in the Cadence® Allegro® PCB…

edhickey 31 Oct 2016 • 1 min read
Allegro 17.2 , Routing , Rigid-Flex , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Breakfast Bytes

Automotive at Linley: Intelligent Vehicles and Intelligent Intersections

The whole afternoon the second day of the Linley Processor Conference was dedicated…

Paul McLellan 31 Oct 2016 • 5 min read
Automotive , NXP , linley processor conference , tensilica vision , mike demler , Automotive Ethernet , Linley , autonomous vehicles , Breakfast Bytes

Breakfast Bytes

How Does Virtualization Work?

I wrote recently about the keynote from the Linley processor conference about network…

Paul McLellan 28 Oct 2016 • 6 min read
Intel , virtualization , IBM , VMware , vm/370 , vm/cms , Breakfast Bytes

System, PCB, & Package Design 

How PCB Design Teams Can Signoff on a Predictable Schedule by Finding Signal Integrity…

Sigrity Tech Tips Series A major challenge for PCB design teams is how…

Sigrity 27 Oct 2016 • 2 min read
PCB , pre-route analyzing , Signal Integrity , Sigrity , Allegro

Breakfast Bytes

What's For Breakfast? Video Preview October 31st to November 4th

https://youtu.be/wL43x-MOfWY It's Automotive Week on Breakfast Bytes. …

Paul McLellan 27 Oct 2016 • less than a min read
Automotive , ARM Techcon , functional safety , NXP , softbank , deep learning , wave computing , linley group , DVcon , DVCon Europe , ISO 26262 , wired magazine , ARM , fusa , reliability

Breakfast Bytes

Sophia Antipolis

Sophia Antipolis is in the south of France, a sort of research park carved out of…

Paul McLellan 27 Oct 2016 • 5 min read
vlsi technology , Intel , NXP , Infineon , Freescale , amadeus , Samsung , Bosch , dec , compass , Qualcomm , st ericsson , air france , sophia antipolis , Breakfast Bytes , digital equipment corporation

Breakfast Bytes

Make Sure Your Car Doesn't Break Too Often...When It Does, Make Sure You Catch I…

We need our cars to be safe as the amount of electronics in them increases almost…

Paul McLellan 26 Oct 2016 • 6 min read
Automotive , functional safety , iso26262 , ISO 26262 , Breakfast Bytes , reliability

Whiteboard Wednesdays

Whiteboard Wednesdays - Software-Driven VIP

In this week's Whiteboard Wednesdays video, we discuss about integration of IP in…

References4U 25 Oct 2016 • less than a min read
Verification IP , Whiteboard Wednesdays , integration , IP , VIP , SoC design

Academic Network

How Is It to Visit an Open Source Conference?

There are different conferences on microelectronics. There are the industry conferences…

Anton Klotz 25 Oct 2016 • 3 min read
Cadence Academic Network , academia , Risc V , open source , OpenRISC , ORCONF

Breakfast Bytes

DVCon Europe, What You Missed

DVCon Europe took place last week for the third time. If you are in China, you have…

Paul McLellan 25 Oct 2016 • 8 min read
Automotive , functional safety , NXP , DVcon , Accellera , DVCon Europe , ARM , Breakfast Bytes , reliability

Breakfast Bytes

Video Cameras: No Service for You

In the late 1970s, most scientific computing was done on digital equipment (DEC)…

Paul McLellan 24 Oct 2016 • 6 min read
security , bot , IoT , botnet , Internet of Things , mira , ddos , password , Breakfast Bytes , malware

Breakfast Bytes

MemCon: Memory for the Next Five Years

This year's MemCon keynotes were given by Hugh Durdan, VP of the IP Group at Cadence…

Paul McLellan 21 Oct 2016 • 5 min read
Automotive , ddr5 , Memory , DDR4 , LPDDR4 , Enterprise , cadence , LPDDR , Micron , flash , IoT , SSD , HMC , hbc , DRAM , lpddr5 , HPC , DDR , mobile , ADAS , datacenter , Breakfast Bytes , DDR3 , LPDDR3

Verification

DVCon(x2), DVClub(x2): Portable Stimulus Is Everywhere

In my most recent blog post , I talked about the industry vision for portable stimulus…

tomacadence 21 Oct 2016 • 4 min read
horizontal reuse , DAC , uvm , prototyping , pswg , Perspec , System Development Suite , DVClub , Emulation , DVcon , Accellera , portable stimulus , simulation , System Design and Verification

Breakfast Bytes

How Virtualization Is Changing Networking

On the second day of the Linley Processor conference, the keynote was by Bruce Davie…

Paul McLellan 20 Oct 2016 • 5 min read
virtualization , linley processor conference , VMware , Linley , network virtualization , Breakfast Bytes , networking
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