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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
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Blog - Post List

Latest blogs

Analog/Custom Design

Start Your Engines: Use Tcl to Save Signals More Efficiently in AMS Simulations

For large SoC designs, the simulation performance might get impacted by the number…

• 3 min read
save statement , AMS , AMS Designer , AMSD , Start Your Engines , Spectre AMS Designer , Mixed-Signal , probe , xcelium

Artificial Intelligence (AI)

Cadence CEO Unveils Exciting LLM GenAI Breakthrough for Chip Design

In a recent keynote address, Dr. Anirudh Devgan, president and CEO of Cadence, shared…

• 3 min read
artificial intelligence , featured , LLM , cadence.ai , GenAI , AI

Corporate News

INEOS Britannia Is Designing for the Next America's Cup with Cadence

As teams gear up for the 37th edition of the America's Cup, the pressure is on to…

• 1 min read
CFD , FINE Marine , designed with cadence , Computational Fluid Dynamics , america's cup

Verification

The Crucial Need for Synchronization with Third-Party Systems

In today’s interconnected world, businesses and organizations rely heavily on various…

• 3 min read

System, PCB, & Package Design 

Training Webinar: Celsius Thermal Solver - Recording Available

The Cadence Celsius Thermal Solver is the industry’s first complete electrothermal…

• 1 min read
Sigrity and Systems Analysis , Celsius Thermal Solver , PDN , Signal Intregrity , Power Integrity , PCB Signal integrity , PCB design , PowerDC

Corporate News

Cadence Creates Industry’s First LLM Technology for Chip Design

In the nine short months since OpenAI brought ChatGPT (a Chat Generative Pre-Trained…

• 4 min read
featured , LLM , cadence.ai , Generative AI , GenAI

Artificial Intelligence (AI)

Common Tensilica Software Stack Delivers Best-In-Class Edge AI Performance

Developing an agile software stack is important for successful AI deployment on the…

• 2 min read
artificial intelligence , Edge AI , featured , deep learning , ai-driven , On-Device AI , AI/ML

PCB、IC封装：设计与仿真分析

如何在封装设计中创建并使用非圆形过孔堆叠？

要设计出尺寸更小的电子器件，可以在多层基板或多层印刷电路板 (PCB) 中采用高密度设计，增加每层的使用率。在多层封装或多层电路板的设计和制造过程中，过孔的作用不可或缺…

• less than a min read
Chinese blog , IC封装设计 , 软件技巧 , Allegro Package Designer Plus , 中文 , Allegro

System, PCB, & Package Design 

CadenceTECHTALK: Solution for 3D-IC Interposer Signal Integrity

3D-IC design requires early analysis of thermal properties, power delivery, and signal…

• less than a min read
3D-IC , Signal Integrity , interposer

Spotlight Taiwan

CadenceLIVE Taiwan 2023 感謝有您、圓滿落幕!

半導體與 EDA年度盛會 - CadenceLIVE Taiwan 使用者大會在8月31日圓滿落幕。匯聚超過40場技術趨勢演講、涵括 6大技術分場與成功案例、串聯近20家產業學界專家…

• less than a min read
MSA , 3D-IC , cadencelive taiwan , Virtuoso , taiwanese blog , intelligent system design

Corporate News

Generative AI in Design Tools: Solving the Engineering Productivity Crisis

People are adopting more and more technologies like AI into their lives. New intelligent…

• 6 min read
optimality , Allegro X AI , featured , Virtuoso Studio , Generative AI , cerebrus , verisium , GenAI

Life at Cadence

DEI@Cadence: Why Words Matter for One Cadence—One Team

Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified…

• 4 min read
inclusion , featured , Cadence Academic Network , cadence , diversity , DEIatCadence , wordsmatter , equity

Corporate News

finot-conq Is Designing Award-Winning Yachts with Fidelity Fine Marine

For over 50 years, finot-conq has been at the forefront of the yacht design industry…

• 1 min read
CFD , Cadence Oncloud , FINE Marine , cloud , designed with cadence

PCB設計／ICパッケージ設計

AI PCB Design: ジェネレーティブAIが我々をコンストレイントから可能性へと導く方法

ジェネレーティブAI（または生成AI）は、PCB設計における次の大きな一歩を示します。 もちろん、この言葉は期待通りのものでしょう。2023年はジェネレーティブAIの台頭に支配された年であり…

• less than a min read
PCB , Allegro X AI , Generative AI , japanese blog , allegro x , Allegro

RF Engineering

Training Webinar: Microwave Office: An Integrated Environment for RF and Microwave…

A recording of a training webinar on Microwave Office is available. Topics show the…

• 1 min read

Academic Network

Reutlingen University Certified as Cadence Academic Network Lab

Let’s start with a confession: Reutlingen is not the most famous city in Germany…

• 3 min read
Juergen Scheible , Eckhard Hennig , Cadence Academic Network , Certified Lab , Reutlingen University

Computational Fluid Dynamics

Cadence TECHTALK - Efficient Thermal Management for Enhanced Electronics Performance…

Come join our one-hour session to discover how the Celsius EC Solvers utilizes data…

• 1 min read
CFD , thermal management , featured , Cadence TECHTALK , Celsius EC Solver , Electronics cooling , fluid dynamics , simulation software

カスタムIC／ミックスシグナル

Virtuoso Meets Maxwell: Custom Passive Device Authoring – パート 2 (LVS)

'Virtuoso Meets Maxwell'はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

• 1 min read
EM simulation , Virtuoso Meets Maxwell , Virtuoso RF Solution , Electromagnetic Solver , Virtuoso Multi-Technology Solution , japanese blog , Custom IC Design , IC23.1

Verification

Introducing PCIe's Integrity and Data Encryption Feature (IDE)

The Integrity and Data Encryption (IDE) was published in PCIe (Peripheral Component…

• 2 min read
Verification IP , encryption , PCIe , pcie gen6 , IDE
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