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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

Thermal Analysis of Package/PCB Systems: Challenges and Solutions

More and more package/PCB system designs are requiring thermal analysis. Power dissipation…

• 3 min read
PCB , PI , Power Integrity , Voltus , electrical-thermal co-simulation , thermal , PowerDC

Breakfast Bytes

Spanish Flu Is 100 Years Old on Sunday

This Sunday, March 11, is the 100th anniversary of the outbreak of Spanish flu in…

• 6 min read
spanish flu , h7n4 , flu virus , h1n1

Analog/Custom Design

Virtuosity: Exploring Histories

OK we heard you, you want to be able to specify Virtuoso ADE Explorer history names…

• 3 min read
ADE Explorer , ADE , Virtuosity , ADE Assembler

Analog/Custom Design

Virtuosity: Do I Need To Run a Simulation To Plot From a Text File?

You'll be glad to hear the answer is No! In Virtuoso Visualization and Analysis,…

• 2 min read
Analog Design Environment , ViVa-XL , ADE Explorer , Explorer , Analog Simulation , ADE XL , ADE , Virtuoso Analog Design Environment , Virtuoso , Analog Design Environment , ViVA , Virtuosity , Assembler , ADE Assembler

Breakfast Bytes

embedded world: Mark Papermaster of AMD

The opening keynote from embedded world in Nuremberg was by Mark Papermaster, who…

• 4 min read
epyc , Automotive , ryzen , AMD , Embedded World

Breakfast Bytes

3nm Cadence and imec

I started Breakfast Bytes on October 8, 2015, my first day back at Cadence. The very…

• 4 min read
Genus , testchip , 3nm , imec , Innovus , 5nm

Whiteboard Wednesdays

Whiteboard Wednesdays - Error Correction Code Implementations in Memory Controller…

In this week's Whiteboard Wednesdays video, Jing Liu provides a simple explanation…

• less than a min read
DDR Controller , Whiteboard Wednesdays , ECC

Verification

App Note Spotlight: Choosing the Incremental Elaboration Flow That’s Right For Y…

Welcome to another App Note Spotlight! One of the biggest issues facing verification…

• 2 min read
incremental elaboration , Flows , Functional Verification , MSIE

Breakfast Bytes

Spectre with a Red Hat, part 2

This is the second post about Red Hat's John Masters presentation at FOSDEM 2018…

• 6 min read
red hat , Spectre , jon masters , linux

Breakfast Bytes

Spectre with a Red Hat

A couple of weekends ago it was FOSDEM 2018, the largest conference on open source…

• 8 min read
security , meltdown , Redhat , Spectre , linux

The India Circuit

Incubators, Accelerators and Fabless Chip Design at IESA Vision Summit 2018

This week we had one of the Indian semiconductor industry’s biggest and most well…

• 6 min read
Vision Summit , Government of Karnataka , fabless chip , IESA , India Electronics and Semiconductor Association , Priyank Kharge , semiconductor incubator

Breakfast Bytes

Engineers, and How to Manage Them

I've covered various aspects of an EDA company: sales, marketing, application engineers…

• 6 min read
management , ambit , engineering

Breakfast Bytes

What the FEC is Forward Error Correction?

What is forward error correction (FEC)? It is automatically correcting errors in…

• 8 min read
fec , hamming , galois , Breakfast Bytes , shannon , forward error correction , networking , ECC

Breakfast Bytes

What's For Breakfast? Video Preview March 5th to March 9th 2018

https://youtu.be/YesJPmKCeio Coming from Embedded World, Nuremberg (camera Robert…

• less than a min read
AMD , IBM , 3nm , red hat , imec , Spectre , Embedded World , linux

Whiteboard Wednesdays

Whiteboard Wednesdays - Unpacking the DFI Low-Power Interface

In this week's Whiteboard Wednesday, John MacLaren describes the operation of the…

• less than a min read
Low Power , Whiteboard Wednesdays , DFI , DDR PHY

Breakfast Bytes

Embedded World 2018: Dreaming of Electric Cars

I am at embedded world in Nuremberg. One thing that is not here is warm weather.…

• 7 min read

SoC and IP

Why Software-Based GPS Is Great for Location-Based IoT Applications

At the Cadence booth at Mobile World Congress in Barcelona, we’re featuring a demo…

• 1 min read

Breakfast Bytes

How Many Journalists per Square Acre?

It doesn't matter how low your standard is for science journalism, the journalists…

• 5 min read
kilowatt , degree , kilowatt hour

Analog/Custom Design

Take Advantage of Advancements in Real Number Modeling and Simulation

Verification is the top challenge in mixed-signal design. Bringing analog and digital…

• 2 min read
real number modeling , analog , Mixed-Signal , RNM , mixed-signal verification
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