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Featured

Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
Corporate 30 Jun 2026 • 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
Corporate 25 Jun 2026 • 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
Corporate 24 Jun 2026 • 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
Corporate 23 Jun 2026 • 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
cdns - all_blogs_categories

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  • System, PCB, & Package Design  1018
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  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

SoC and IP

Building the Cars of the Future

The big buzz in the automotive industry lately is autonomous driving vehicles. Companies…

Priyab 15 Aug 2016 • 3 min read
Verification IP , VIP , Automotive Ethernet , CAN , automotive electronics , Ethernet , Design IP and Verification IP , Lin

Breakfast Bytes

What's for Breakfast? August 15th

It's verification week this week, with 5 posts about various aspects of Cadence's…

Paul McLellan 15 Aug 2016 • 1 min read
Breakfast Bytes

Breakfast Bytes

Verification Technology Update

At CDNLive in Bengaluru last week, Michal Siwiński gave a technology update on verification…

Paul McLellan 15 Aug 2016 • 4 min read
Perspec , Protium , VIP , Palladium , Incisive , Indago , JasperGold , Breakfast Bytes , vManager , verification

Breakfast Bytes

5G, Coming Soon to a Phone Near You

At the Linley Mobile Conference recently, the morning after Linley's keynote was…

Paul McLellan 12 Aug 2016 • 3 min read
5G , Linley , simultaneous connectivity , mobile , Breakfast Bytes

Verification

The Evolution of MIPI DSI

The MIPI DSI specification has come a long way from the days of its early introduction…

Priyab 10 Aug 2016 • 2 min read
Verification IP , MIPI Alliance , IoT , VIP , MIPI , DSI , Tensilica , design , Internet of Things , and Verification IP

Breakfast Bytes

CDNLive Bengaluru: Day 2

CDNLive Bengaluru takes place over two days. But it is organized very differently…

Paul McLellan 10 Aug 2016 • 7 min read
NXP , CDNLive India , CDNLive , whats for breakfast , cdnlive bengaluru , implementation , tapeout

Breakfast Bytes

CDNLive Bengaluru: Day 1

As I did at the Design Automation Conference in Austin earlier this year, I will…

Paul McLellan 9 Aug 2016 • 7 min read
CDNLive , bengaluru , bangalore , Breakfast Bytes , analog devices

Whiteboard Wednesdays

Whiteboard Wednesdays—Radar Signal Processing for Automotive Applications

In this week's Whiteboard Wednesdays video, the first of a two-part series, Pushkar…

References4U 9 Aug 2016 • less than a min read
Automotive , DSP , Whiteboard Wednesdays , IP , radar , Tensilica

Breakfast Bytes

CDNLive Bengaluru, a Long Journey

I've not been to Bengaluru for about 20 years, when I ran engineering at Compass…

Paul McLellan 8 Aug 2016 • 3 min read
CDNLive India , bengaluru , Cadence India , Breakfast Bytes

System, PCB, & Package Design 

Five Industry Experts Coming to CDNLive Boston to Discuss Signal and Power Integrity…

Who Are They? Istvan Novak – Senior Principal Engineer at Oracle Kevin Roselle…

TeamAllegro 8 Aug 2016 • less than a min read
CDNLive , Signal Intregrity , Power Integrity , Boston , PCB design

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Persistent Snap and Select? New Capabilities…

The 16.6-2015 Allegro PCB Editor release introduces a few new features that provide…

Jerry GenPart 8 Aug 2016 • 2 min read
PCB Layout and routing , Cadence Design Systems , Allegro GUI , Allegro 16.6 , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor

Breakfast Bytes

What's for Breakfast? August 8th

This is the first weekly video "What's for Breakfast?" that previews the blog entries…

Paul McLellan 8 Aug 2016 • 1 min read
risc-v , CDNLive India , CDNLive , preview , whats for breakfast? , cdnlive bengaluru , mobilemobile 5g , Breakfast Bytes

Breakfast Bytes

Breakfast Bytes Guide to Japan Travel

Cadence was shut down for the week of July 4th, so I went to Japan with a friend…

Paul McLellan 5 Aug 2016 • 5 min read
tsukiji , kyoto , osaka , tourism , narita , kansai , japan , travel , haneda

Breakfast Bytes

Merger Mania

At the recent GSA Silicon Summit at the Computer History Museum in Mountain View…

Paul McLellan 4 Aug 2016 • 6 min read
Wally Rhines , merger mania , gsa silicon summit , mergers , gsa , Breakfast Bytes , acquisitions , Mentor

Breakfast Bytes

Chipworks Looks at Smartphones

Chipworks buys hundreds of devices every year and strips them down to look at the…

Paul McLellan 3 Aug 2016 • 4 min read
Intel , Apple , Samsung , TSMC , Linley , wearables , mobile , GlobalFoundries , smartphones , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Using Processor Clusters to Implement Neural Networks

In this week's Whiteboard Wednesdays video, Chris Rowen describes how to use processor…

References4U 2 Aug 2016 • less than a min read
Whiteboard Wednesdays , IP , processor clusters , Tensilica , neural networks , CNN

SoC and IP

Fastest Octal SPI Flash Interface Available Now From Cadence

Flash memory is being utilized in computers and electronic devices found in Automotive…

Zachi Friedman 2 Aug 2016 • 1 min read
PHY , octal spi , spi , nor flash

SoC and IP

Cadence at Flash Memory Summit 2016: Octal SPI, eMMC 5.1, ONFi 4, and Tensilica SSD…

If you design with flash memory components or IP solutions, head on over to the Santa…

Priyab 2 Aug 2016 • 1 min read
Verification IP , Design IP , Memory , VIP , Tensilica , semiconductor IP , Design and Verification IP , Design IP and Verification IP , memories

Breakfast Bytes

Smartphones: Linley's Annual Review

Last week was the Linley Mobile Conference, although it is now the Mobile and Wearables…

Paul McLellan 2 Aug 2016 • 3 min read
Apple , Samsung , wearables , mobile , Smartphone , Huawei
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