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Corporate News

AI Infrastructure Starts Beyond the Chip

Why Advanced Packaging and PCB Design Have Become the Next Frontier of Innovation…

Corporate
• 7 min read
chip , featured , AI infrastructure , agentic ai , packaging

Digital Design

Cadence RTL Design Studio: Built for the Full PPAC Journey

If you've used Joules RTL Design Studio, you already know what it can do. Now it…

raquelp
• 2 min read
Digital Design and Signoff , featured , Joules , Digital Implementation , rtlstudio

Corporate News

How the New ASK AI Assistant Makes Support More Seamless

Finding the right answer often takes more than one question. Users may start with…

Corporate
• 2 min read
featured , customer support , Generative AI , ASK Portal , ASK AI Assitant

Artificial Intelligence (AI)

You'll Still Do the Work—You Just Won't Do the Boring Part

Agentic AI is about to change your flow. Here's what actually shifts—and why the…

Corporate
• 5 min read
artificial intelligence , featured , agentic ai , NVIDIA , AI for design
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Latest blogs

RF Engineering

Senrinotabi

Greetings! My name is Art Schaldenbrand and I have been at Cadence for 12 years supporting…

• less than a min read
RF design

System, PCB, & Package Design 

How many DEHDL (Concept) designers customize their DEHDL environment?

I'm curious with the availablity within DEHDL (ConceptHDL) of customizing the menus…

• less than a min read
DEHDL , Library and design data management , Front-end PCB design , ConceptHDL

Verification

'Verification Acceleration' vs. 'Simulation Acceleration'

Simulation acceleration and emulation technology has been commonly used to run faster…

Anonymous • 1 min read
Acceleration , System Design and Verification , Emulation , Verification Acceleration , Simulation acceleration

System, PCB, & Package Design 

Which SPB customers will be attending CDNLive! 2008 in San Jose?

While I've attended a few Cadence Corporate User Group events over the past years…

• 1 min read
SPB , Design Entry HDL , Front-end PCB design , PCB design

System, PCB, & Package Design 

Lack of design-chain collaboration prevents SiP to go mainstream

A few years back, I was considering that the lack of an integrated design solution…

• 1 min read
backend implementation , IDMs , IC Packaging & SiP design , PDK , design chain

RF Engineering

Cadence, the new kid on the Electromagnetic Solver Block

On June 16 2008, Cadence introduced a new Electromagnetic (EM) solver technology…

• less than a min read
RF designer , Electromagnetic (EM) , RF design , wireless integrated circuit verification

Verification

ESL handoff: closer than you think

Take a look at the article linked below, titled: "ESL handoff: closer than you think…

• less than a min read
System Design and Verification , ESL handoff

Verification

Dreaming in Code

One of the best books I read this year is called Dreaming in Code by Scott Rosenberg…

• 2 min read
Dreaming in Code , System Design and Verification , Chandler project

Verification

Do you want to buy my chip?

Once upon a time semiconductor companies produced a chip, made a data sheet, showed…

• 1 min read
System Design and Verification , Hardware/software co-verification
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