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Featured

Corporate News

The Three-Layer Cake: The Foundation Behind Intelligent Engineering

Artificial intelligence is rapidly becoming the engine behind the next era of technology…

Corporate
Corporate 18 Jun 2026 • 7 min read
featured , infrastructure ai , agentic ai , Principled Simulation , physical ai

Data Center

Cadence Accelerates Digital Twin–Driven Data Center AI Modernization with HPE

Solution will maximize data center and AI factory profitability while delivering…

Corporate
Corporate 16 Jun 2026 • 3 min read
news story , featured , infrastructure ai , data center , hpe

Corporate News

Honda + Cadence = Physical AI (part 1): What Does “Physical AI” Really Mean?

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The more widely the term …

Corporate
Corporate 15 Jun 2026 • 7 min read
featured , physical ai , HGR , AI , Honda

Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
Corporate 11 Jun 2026 • 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform
cdns - all_blogs_categories

  • All 6397
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  • System, PCB, & Package Design  1015
  • Verification 1324
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  • Physical Systems Simulation 14

  • CFD(数値流体力学) 45
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  • カスタムIC/ミックスシグナル 199
  • PCB、IC封装:设计与仿真分析 136
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Blog - Post List
Latest blogs

Digital Design

Cadence Doc Assistant: Elevate Your Knowledge With Our Next-Gen Help System

The SSV 23.1 release comes with a brand-new content delivery application called Cadence…

SSV Release Team 20 Dec 2023 • 3 min read
documentation , Silicon Signoff and Verification , Search , SSV , Cadence Doc Assistant , help , Cadence Help , 23.1

Digital Design

SSV 23.1 Base Release Now Available

The Silicon Signoff and Verification (SSV) 23.1 release is now available for download

SSV Release Team 20 Dec 2023 • 4 min read
Celsius Thermal Solver , Silicon Signoff and Verification , Die-Model Grid Reduction , Voltus IC Power Integrity Solution , Silicon Prediction , hyperscale , SSV23.10 , Thermal Analysis , Power Analysis , Tempus Timing Signoff Solution , Skew Robustness , Doc Assistant

Digital Design

Training Insights – Implement Your Digital Circuits Using Virtuoso Digital Implementation…

Are you excited to know more about the Virtuoso Digital Implementation flow, which…

P Saisrinivas 20 Dec 2023 • 3 min read
Innovus Implementation System , Virtuoso Digital Implementation , training bytes , Digital Implementation , Genus Synthesis Solution , Mixed Signal Designers , Analog on top designs

Corporate News

Cadence Soars Up the Wall Street Journal List of Best Managed Companies in 2023

We are thrilled to announce that Cadence has secured the #74 spot on the 2023 Wall…

Corporate 19 Dec 2023 • 1 min read
featured , Cadence Culture , Best Managed Companies , Employee Engagement , One Cadence One Team , Wall Street Journal

Life at Cadence

DEI@Cadence: Sharing and Learning in 2023

Wrapping up 2023 by sharing the thoughts of Cadence leaders on DEI at Cadence as…

Jonaki 19 Dec 2023 • 3 min read
Cadence Design Systems , Insights on Culture , inclusion , featured , DEI , LifeAtCadence , diversity , DEIatCadence , equity

Analog/Custom Design

Training Insights – Virtuoso Spectre Transient Noise

This two-day training course focuses on transient noise simulations using the Spectre…

Pratul Nijhawan 19 Dec 2023 • 3 min read
blended , blended training , ADE Explorer , learning , training , Virtuoso Analog Design Environment , Cadence training , digital badges , training bytes , Virtuoso , Spectre , Cadence certified , learning map , Schematic Editor , Cadence Education Services , Custom IC , Schematic , Spectre X Simulator , ADE Assembler

PCB、IC封装:设计与仿真分析

如何在高速信号中降低符号间干扰

在考虑高速通道中影响 PCB 信号完整性的问题时,特别应该诊断的是符号间干扰。这种特定的信号完整性问题涉及比特流中信号之间的干扰。那么,符号间干扰是什么?其产生的原因是什么…

Sigrity 19 Dec 2023 • less than a min read
PCB , 串扰 , SI , Chinese blog , 仿真分析 , 符号间干扰 , 高速互连设计 , 高速信号 , 高速设计 , PCB设计 , 中文 , Sigrity , crosstalk , 信号完整性

Verification

Understanding Embedded USB2 (eUSB2) and its usage

The need for higher processing power and lower power consumption are driving processors…

Sanjeet Kumar 19 Dec 2023 • 2 min read
VIP , USB , eUSB2

System, PCB, & Package Design 

Ascent: Training Insights: Unveiling Allegro X System Capture Basics Course

Allegro X System Capture offers a complete ecosystem for PCB designing. Schematic…

Priyadarshini N D 19 Dec 2023 • 4 min read
PCB , System Capture , design variants , SPB , design , PCB design , Training Insights , 23.1

System, PCB, & Package Design 

Podcast: Heterogeneous Integration Challenges

Heterogeneous integration is changing system design and analysis. Simply following…

NaomiM 18 Dec 2023 • less than a min read
IC Packaging , Allegro package design , 3D-IC , Allegro Package Designer , heterogenous integration

Verification

Unraveling PCIe 6.0 Loopback and Digital Near-End Loopback Feature

PCIe spec has given a specific LTSSM state named Loopback , which is intended for…

sabnams 18 Dec 2023 • 2 min read
PHY , NELB , Loopback , Gen6 , PCIe 6.0

カスタムIC/ミックスシグナル

Start Your Engines: ミックス・シグナルモデリングでlogic信号をelectrical値に変換するベストプラクティス

Cadence® Spectre® AMS Designerは、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

Custom IC Japan 18 Dec 2023 • 1 min read
AMS , AMS Designer , mixed signal solution , analog/mixed-signal , AMS simulation , japanese blog , mixed-signal design , AMS Verification , mixed-signal verification

PCB、IC封装:设计与仿真分析

如何在 CFD 设计中利用网格维护几何形状并减少运行时间?

在 CFD 仿真中,求解的质量在很大程度上取决于网格划分。网格间距如果不能求解流体变量的局部变化,就会引入离散化误差。但如果网格过于精细,就会增加不必要的计算时间和工作量…

SDA China 18 Dec 2023 • less than a min read
网格划分 , CFD , Chinese blog , 计算流体力学 , 网格生成 , 网格自适应 , 中文 , Fidelity CFD , 汽车 , Fidelity Pointwise

Artificial Intelligence (AI)

Cadence GenAI and the Tesla Cybertruck

The Tesla Cybertruck made its first tech-community appearance at this year’s Global…

Steve Brown 15 Dec 2023 • 2 min read
artificial intelligence , featured , Generative AI , GenAI , AI

Analog/Custom Design

Knowledge Booster Training Bytes - Using SKILL IDE in Virtuoso Studio

In this blog, you will learn how to use the SKILL IDE tool effectively for writing…

Vishnu Teja S 15 Dec 2023 • 7 min read
Virtuoso , SKILL IDE , Custom IC Design , Virtuoso Layout Suite , SKILL

Analog/Custom Design

Analog Layout – Stop the Antenna Effect from Destroying Your Circuit

There is a problem at the heart of how ICs are made, which unless carefully managed…

Mark Williams 15 Dec 2023 • 4 min read

System, PCB, & Package Design 

BoardSurfers: Reusing AWR Microwave Office RF Blocks in Allegro PCB Designs

While RF circuits might appear complex at first glance, with the right tools, you…

Sangeetha Sukumaran 14 Dec 2023 • 4 min read
RF PCB , AWR MWO , RF module , RF design , AWR Microwave Office , Allegro System Capture , Allegro PCB Editor , Allegro

Corporate News

Kudan Is Revolutionizing the Smart Vision Systems of Tomorrow

Kudan is a computer vision software company focusing primarily on simultaneous localization…

Tanushri Shah 14 Dec 2023 • 1 min read
vision Q7 , designed with cadence , Vision DSPs , SLAM , Tensilica

Corporate News

Cadence Managed Cloud Service Drives Automotive Sensor Solutions for Murata Finl…

Did you know that a modern automobile might contain as many as 100 sensors? Automotive…

Corporate 14 Dec 2023 • 3 min read
Automotive , EDA tools , cloud , cadence cloud
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