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Featured

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
Corporate 2 Jun 2026 • 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
Corporate 31 May 2026 • 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
Corporate 21 May 2026 • 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
Corporate 20 May 2026 • 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
cdns - all_blogs_categories

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  • Artificial Intelligence 26
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  • Data Center 57
  • Digital Design 458
  • Learning and Support 62
  • RF Engineering 116
  • SoC and IP 435
  • System, PCB, & Package Design  1015
  • Verification 1321
  • Cadence Japan 17
  • Physical Systems Simulation 5

  • CFD(数値流体力学) 45
  • 中文技术专区 9
  • カスタムIC/ミックスシグナル 199
  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 45
  • Spotlight Taiwan 64
  • The India Circuit 93
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Digital Design

Let Your DRC Fly! Cadence Announces Breakthrough in SoC Physical Verification

This morning we announced our next-generation Pegasus Verification System, the biggest…

Manoj Chacko 11 Apr 2017 • 2 min read
Physical verification , CDNLive , pegasus , DRC , design rule check , silicon signoff

Breakfast Bytes

What's For Breakfast? Video Preview April 17th to 21st 2017

https://youtu.be/3sofRincYsg Coming from CDNLive Silicon Valley (camera Sean…

Paul McLellan 11 Apr 2017 • less than a min read
ser , linley group , ccix , SDE , single event error , cache coherency , open source , see , system design enablement , ISO 26262 , ADAS , autonomous vehicles

Breakfast Bytes

Pegasus Flies to the Clouds

There is a famous line in Lewis Carrol's Through the Looking Glass that could have…

Paul McLellan 11 Apr 2017 • 5 min read
pvs2 , Physical verification , pegasus , Dracula , DRC , design rule check , PVS , Assura , Breakfast Bytes

Breakfast Bytes

Six Reasons to Go to DAC—Plus One Very Big One

There are thousands of good reasons to go to DAC this year. I'll give you seven in…

Paul McLellan 10 Apr 2017 • 5 min read
dac54 , Costello , Joe Costello , dac43 , keynote , Design Automation Conference , Breakfast Bytes

Breakfast Bytes

What Keeps MGM's Head of Security Up at Night? Lightbulbs!

The trusted supplier day at GOMAC opened with a slightly off-topic, but fascinating…

Paul McLellan 7 Apr 2017 • 8 min read
security , mgm , target , mgm resorts international , gomac , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview April 10th to 14th 2017

https://youtu.be/nvwMIujDzco Coming from Monterey CA (camera me) Monday…

Paul McLellan 6 Apr 2017 • less than a min read
irds , PCB , security , Intel , DAC , paolo gargini , dac54 , ITRS , CDNLive , linley group , Linley , cloud , fingerprint , OrCAD , retimers , gomac , datacenter , networking

Breakfast Bytes

See Further by Standing on the Shoulders of...OpenVX

For power and performance reasons, video and vision processing are attractive to…

Paul McLellan 6 Apr 2017 • 5 min read
khronos , Vision P6 , Tensilica , openvx , Breakfast Bytes

Digital Design

“Great” Hardware Design in a Wireless World

As part three of the “ Making Hardware Design Great Again” series , let’s see how…

dpursley 5 Apr 2017 • 4 min read
High-Level Synthesis , digital implementation , Digital Implementation , HLS

System, PCB, & Package Design 

PSpice – A SPICE Tool Way Beyond Functional Simulation Being Showcased at CDNLive…

Every year Cadence Design Systems an industry leader in the Electronic Design Automation…

Jerry GenPart 5 Apr 2017 • less than a min read
Cadence Design Systems , AMS simulator , PSPICE , Grzenia , Allegro

SoC and IP

USB Type-C: Let’s Get Real

Have you tried a product incorporating the new USB Type-C port? Do you wonder how…

tomhackett 5 Apr 2017 • 1 min read
Design IP , USB Type-C , USB-IF , USB , Type-C , Design IP and Verification IP , USB 3.1

Breakfast Bytes

GOMAC: A Conference that Starts with the National Anthem

GOMACTech is the GOvernment Microcircuit Applications and Critical Technology conference…

Paul McLellan 5 Apr 2017 • 9 min read
gomac tech , spectrum , gomac , electromagnetic spectrum , gomactech , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - A Real-Life Encounter with 3 Benefits of USB Type-C

In this week's Whiteboard Wednesdays video, Tom Hackett describes his experience…

References4U 4 Apr 2017 • less than a min read
Whiteboard Wednesdays , USB Type-C , USB

Breakfast Bytes

Autonomous Cars—Are We There Yet?

This is the second of two posts on the CASPA Symposium on Autonomous Driving. The…

Paul McLellan 4 Apr 2017 • 7 min read
lidar , chinese semiconductor professionals association , caspa , ADAS , autonomous vehicles , Breakfast Bytes

Academic Network

From China through Cadence to IMEC

Zhan Gao studied microelectronics in the Xidian University in China and after getting…

Anton Klotz 3 Apr 2017 • 1 min read
Cadence interns , Interns , Cadence Academic Network , imec , ATPG

Breakfast Bytes

CASPA's Autonomous Driving Symposium

Recently, CASPA, the Chinese-American Semiconductor Professionals Association, held…

Paul McLellan 3 Apr 2017 • 6 min read
lidar , chinese semiconductor professionals association , caspa , ADAS , autonomous vehicles , Breakfast Bytes

Digital Design

Have DRC Tools Run Out of Steam? – Part 2

We are continuing the physical verification blog posts with more questions we hear…

Manoj Chacko 31 Mar 2017 • 3 min read
massively scalable , DRC , multithread , distributed processing

Breakfast Bytes

ESD Alliance CEO Panel: April 6th

In the days when the ESD Alliance was still called EDAC, they used to organize a…

Paul McLellan 31 Mar 2017 • 4 min read
cadence , ceo forum , EDA , ARM , synopsys , Breakfast Bytes , esd alliance , Mentor

Analog/Custom Design

Virtuoso Video Diary: Controlling the Information Displayed on Outputs Setup and…

In Virtuoso ADE Explorer and Virtuoso ADE Assembler , it’s not unusual to see a large…

NamrataM 30 Mar 2017 • 3 min read
Analog Design Environment , ADE Explorer , Virtuoso ADE , Virtuoso Analog Design Environment , Virtuoso , Virtuoso Video Diary , Custom IC Design , ADE Assembler

Breakfast Bytes

My Breakfast with Lucio

There is a famous 1981 movie called My Dinner with Andre. If you've not seen it,…

Paul McLellan 29 Mar 2017 • 5 min read
open source ip , IoT , lanza techventures , Lucio Lanza , Internet of Things , Breakfast Bytes , efabless
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