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Featured

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
Corporate 2 Jun 2026 • 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
Corporate 31 May 2026 • 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
Corporate 21 May 2026 • 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
Corporate 20 May 2026 • 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
cdns - all_blogs_categories

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  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Academic Network

How Is It to Visit an Open Source Conference?

There are different conferences on microelectronics. There are the industry conferences…

Anton Klotz 25 Oct 2016 • 3 min read
Cadence Academic Network , academia , Risc V , open source , OpenRISC , ORCONF

Breakfast Bytes

DVCon Europe, What You Missed

DVCon Europe took place last week for the third time. If you are in China, you have…

Paul McLellan 25 Oct 2016 • 8 min read
Automotive , functional safety , NXP , DVcon , Accellera , DVCon Europe , ARM , Breakfast Bytes , reliability

Breakfast Bytes

Video Cameras: No Service for You

In the late 1970s, most scientific computing was done on digital equipment (DEC)…

Paul McLellan 24 Oct 2016 • 6 min read
security , bot , IoT , botnet , Internet of Things , mira , ddos , password , Breakfast Bytes , malware

Breakfast Bytes

MemCon: Memory for the Next Five Years

This year's MemCon keynotes were given by Hugh Durdan, VP of the IP Group at Cadence…

Paul McLellan 21 Oct 2016 • 5 min read
Automotive , ddr5 , Memory , DDR4 , LPDDR4 , Enterprise , cadence , LPDDR , Micron , flash , IoT , SSD , HMC , hbc , DRAM , lpddr5 , HPC , DDR , mobile , ADAS , datacenter , Breakfast Bytes , DDR3 , LPDDR3

Verification

DVCon(x2), DVClub(x2): Portable Stimulus Is Everywhere

In my most recent blog post , I talked about the industry vision for portable stimulus…

tomacadence 21 Oct 2016 • 4 min read
horizontal reuse , DAC , uvm , prototyping , pswg , Perspec , System Development Suite , DVClub , Emulation , DVcon , Accellera , portable stimulus , simulation , System Design and Verification

Breakfast Bytes

How Virtualization Is Changing Networking

On the second day of the Linley Processor conference, the keynote was by Bruce Davie…

Paul McLellan 20 Oct 2016 • 5 min read
virtualization , linley processor conference , VMware , Linley , network virtualization , Breakfast Bytes , networking

Breakfast Bytes

What’s for Breakfast? Preview October 24th to 28th (video)

https://youtu.be/PHVpQ_-tmY8 Monday: The IoT attacks, with the biggest distributed…

Paul McLellan 19 Oct 2016 • less than a min read
security , OIP , vast , Automotive , virtualization , functional safety , IoT , distributed denial of service , VMware , botnet , TSMC , vm/370 , Internet of Things , DVcon , DVCon Europe , ISO 26262 , ADAS , sophia antipolis , ddos , fusa , reliability , Virtutech

Breakfast Bytes

Andrzej Strojvas, the 2016 Kaufman Award Recipient

This year's Kaufman Award recipient is Andrzej Strojvas. He is the Keithley professor…

Paul McLellan 19 Oct 2016 • 5 min read
Andrzej Strojvas , Kaufman Award , cmu , pdf solutions , EDAC , carnegie meilon university , kaufman , Breakfast Bytes , esd alliance

Academic Network

Try These Innovative Online Educational Tools

Web applications for electronics design provide an environment where users can apply…

ChristinaK 19 Oct 2016 • 6 min read
EDA Playground , Cadence Academic Network , Spicy VOLTsim , Incisive simulator , ElvisLab

Whiteboard Wednesdays

Whiteboard Wednesdays - Error Injection: Predefined and Callbacks

In this week's Whiteboard Wednesdays video, James David talks about the benefits…

References4U 18 Oct 2016 • less than a min read
Verification IP , Whiteboard Wednesdays , IP , VIP , SoC

SoC and IP

3 Reasons That the Semiconductor Clouds Are Gathering

With cloud technology going vertical, everything is changing. The world is connected…

Steve Brown 18 Oct 2016 • 3 min read
CDNLive , PCIe Gen4 , virtual reality , augmented reality

Breakfast Bytes

Silicon on Nothing: the Origins of FD-SOI

Yesterday, I wrote about the new 12FDX process, which is a derivative of the original…

Paul McLellan 18 Oct 2016 • 5 min read
stm , 22fdx , 12fdx , ST , Samsung , gf , silicon on nothing , FinFET , GlobalFoundries , thomas skotnicki , Breakfast Bytes , FD-SOI

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? So How Does Your Design “Stack-Up”? (Reason 5 of…

We are not talking about how your design compares to the next guys’, we’re talking…

eba1221 17 Oct 2016 • 4 min read
Routing , Rigid-Flex , MCAD-ECAD , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Breakfast Bytes

GLOBALFOUNDRIES' Dual Roadmap

The Story So Far GLOBALFOUNDRIES had a 28nm Hi-K PolySi process. I think that…

Paul McLellan 16 Oct 2016 • 5 min read
glofo , 22fdx , 12fdx , 14nm , emram , GlobalFoundries , 7nm , Breakfast Bytes

Analog/Custom Design

Virtuoso Video Diary: Creating Net Groups and Constraining Them with Spacing Using…

In this new age of complex designs and scaling of technology nodes, there are more…

AbhaRawat 14 Oct 2016 • 4 min read
Advanced Node , Virtuoso Schematic XL , Virtuoso Video Diary , Custom IC Design , VLS XL , Virtuoso Layout Suite XL

Breakfast Bytes

How to Verify MIPI Protocols

At the recent MIPI DevCon, Cadence's Ofir Michaeli gave two presentations on verification…

Paul McLellan 14 Oct 2016 • 5 min read
Verification IP , layered protocol , VIP , MIPI , mipi devcon , Breakfast Bytes

Breakfast Bytes

What’s for Breakfast? Preview October 17th to 21st (video)

https://youtu.be/P3jRt2HEe8U Monday: GLOBALFOUNDRIES announced new nodes on their…

Paul McLellan 13 Oct 2016 • less than a min read
glofo , Memory , linley processor conference , MemCon , network function virtualization , Cisco , Carnegie Mellon University , Andrzej Strojvas , VMware , Kaufman Award , 12fdx , cmu , network virtualization , pdf solutions , ST Microelectronics , GlobalFoundries , thomas skotnicki , kaufman

Breakfast Bytes

MemCon 2016: Storage Class Memory

MemCon, the annual all-things-memory conference originally started by Denali and…

Paul McLellan 13 Oct 2016 • 7 min read
vertical flash , SCM , Memory , MemCon , LPDDR , flash , storage class memory , IBM , ddrx , DRAM , DDR , Breakfast Bytes

System, PCB, & Package Design 

What’s Good About Allegro PCB Editor Backdrill Capability? New Capabilities in 17…

The 17.2 Allegro PCB Editor has improved backdrill capabilities. Backdrill data…

Jerry GenPart 12 Oct 2016 • 3 min read
PCB , PCB Layout and routing , Allegro 17.2 , Allegro GUI , layer stacks , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor , Why Move Up to 17.2 , Allegro
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