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Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML

Analog/Custom Design

Virtuoso Studio IC23.1 ISR15 Now Available

Virtuoso Studio IC23.1 ISR15 production release is now available for download.

Virtuoso Release Team
• 2 min read
featured , Virtuoso Studio , IC Release , IC Release Blog Announcement , Virtuoso
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Verification

Predictions for 2009

Having summarized the main verification technology-specific observations that the…

• 3 min read
Specman , HW/SW , verification strategy , metric driven verification (MDV) , Functional Verification , OSCI , Multi-domain verification: HW/SW co-verification , ISX (Incisive Software Extensions) , SystemC , ISX , System Verification , Incisive Enterprise Simulator (IES) , IES

Verification

Functional Coverage for Embedded Software

Hardware verification has evolved into keeping track of a pile of different types…

• 3 min read
FoCus , IBM , System Design and Verification , Specmen , DV club

RF Engineering

Tip of the Week: Guidelines for getting accurate HB QPSS/QPNoise results

Two of the most important parameters for accuracy are: (1) maxharms (2) oversample…

• 1 min read
Virtuoso Spectre , Spectre RF , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , RF design , Circuit Design

Verification

The New Generation Testcase Utility

Specman's new Generation Engine, "IntelliGen", adopts an entirely new generation…

• 4 min read
IntelliGen , Specman , Functional Verification , Testbench simulation , e , Aspect Oriented Programming , Incisive Enterprise Simulator (IES) , IES , AOP

RF Engineering

How to Simulate a Subcircuit (Netlist) With Spectre in ADE

Many users ask, "How do I instantiate a netlist into my schematic and simulate with…

• 1 min read
Virtuoso Spectre , Spectre RF , Virtuoso Spectre Simulator GXL , Virtuoso Spectre Simulator XL , Spectre , Circuit Design

System, PCB, & Package Design 

What's Good About The SPB16.2 PCB SI Release? Full Wave Field Solver!

The SPB16.2 PCB SI release now contains the Electromagnetic Solution 2D Full Wave…

• 6 min read
PCB Layout and routing , SPB 16.2 , field solver , PCB design , Allegro PCB Editor , Allegro

Verification

A Look Back On 2008 (Before Hazarding Predictions for 2009)

Before I dare take a stab at adding to the many predictions already made for 2009…

• 4 min read
HW/SW , verification strategy , metric driven verification (MDV) , Functional Verification , Open Verification Methodology , OVM , Coverage-Driven Verification , CDV , Multi-domain verification: HW/SW co-verification , e , Enterprise Manager , Enterprise Planner , coverage driven verification (CDV)

Verification

The Eternal Debate: "Like" vs. "When" Inheritance

First: Happy New Year, Specmaniacs! Much like the rivarly between the New York Yankees…

• less than a min read
IEEE 1647 , Specman , verification strategy , Functional Verification , e , Aspect Oriented Programming , Incisive Enterprise Simulator (IES) , IES , AOP

Digital Design

Coming This Friday January 9th: Encounter Digital Implementation Office Hours

Happy New Year everyone! I hope you all had a restful, enjoyable and healthy holiday…

• 1 min read
Digital Implementation forums , chat , Encounter Digital Implementation

Verification

Power tool: The Reflection API

One endless source of neat little tricks is the Reflection API built into Specman…

• 1 min read

Verification

Metric-Driven Verification in a Box...

In my last few posts, I was explaining our focus here in Cadence Verification on…

• 1 min read
metric driven verification (MDV) , Functional Verification , Open Verification Methodology , Cadence VIP portfolio , OVM , VIP , Coverage-Driven Verification , CDV , e , Verification IP modeling , eRM

Verification

Make Your Command Line Life Easier With "specman -e"

Hi All, It always amazes me to see just how many Specman users make use of the interactive…

• 1 min read
Specman , Incisive Enterprise Simulator (IES) , IES

Verification

Who said Cadence Can't Invent New Technology Anymore?

I and the rest of the Cadence C-to-Silicon Compiler (CtoS) team were thrilled yesterday…

• 1 min read
deepchip , System Design and Verification , C-to-Silicon

Verification

Shout-out: Q1 2009 DV Club Schedule Posted

Last month I had the pleasure of attending a DV Club lunch presentation on analog…

• less than a min read
events , verification strategy , Verification methodology , Functional Verification

Verification

Thanks for a Great 2008!

Even though 2008 will probably go down in history as the year of Doom and Gloom we…

• 1 min read

Digital Design

It’s the Season of Giving – Send Me Your Design Innovations!

In the last blog, I wrote about innovating your way out of recession with new designs…

• 2 min read
digital Implementationg , innovation , encounter

Verification

Using e Ports

The other day I saw some posts to the Yahoo Specman group regarding e ports. The…

• 3 min read
IEEE 1647 , Specman , verification strategy , Verification methodology , Testbench simulation , e , Verification IP modeling , eRM , Incisive Enterprise Simulator (IES) , IES

Verification

Quickly Create and Manage e Functional Coverage

As a verification engineer, I have always found creating coverage code to be one…

• 3 min read
IEEE 1647 , Specman , Verification methodology , metric driven verification (MDV) , Functional Verification , MDV techtorial , Coverage-Driven Verification , CDV , e , Enterprise Manager , Enterprise Planner , coverage driven verification (CDV)

System, PCB, & Package Design 

Thank You!

As the 2008 year comes to a close, I wanted to say Thank You! Thanks to the hard…

• 1 min read
PCB design
CDNS - Fix Layout Hompage