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Breakfast Bytes: Weekend Update

Paul McLellan

Okay, it's not the weekend, and this isn't Saturday Night Live. But it is an update. With only a handful of exceptions, I write one post per day of around a thousand words. That gives me a problem as to how to update the story when new infor...
- 28 Apr 2020
Analog/Custom Design: Virtuoso Meets Maxwell: Die Export Gets a Facelift

Kabir

Hello everyone, today I’d like to talk to you about the recent enhancements to Die export in the Virtuoso RF Solution, most of which were released in ICADVM 18.1 ISR10. What’s the background for these enhancements? Exporting an abstract of a Die, which basically represents the outer boundary of the Die with I/O locations, as an intermediate file to exchange information between various Cadence tools (i.e., the Innovus…
- 27 Apr 2020
Breakfast Bytes: EDA101 Video

Paul McLellan

Years ago, before I rejoined Cadence, I developed a presentation called EDA101 that was useful for explaining to Wall Street types how the semiconductor and EDA industries fitted together. In some ways, it was a further development of some of the in...
- 27 Apr 2020
Breakfast Bytes: Sunday Brunch Video for 26th April 2020

Paul McLellan

www.youtube.com/watch Made in my living room (camera Carey Guo) Monday: Fourth 4G Network Goes Live in Japan Tuesday: Automotive Reliability: The Bathtub Curve Wednesday: Legato: Making the Bathtub Wider and Deeper Thursday: 15 Years Ago Today t...
- 26 Apr 2020
Breakfast Bytes: "A Lack of Clarity Could Put the Brakes on Any Journey to Success"

Paul McLellan

I'm not a big fan of the J-school approach to writing an article where you start with some anecdote that has nothing to do with what you are going to write about. Most articles like that are best started on the second page. But I did l...
- 24 Apr 2020
Academic Network: Stay Ahead of the Curve with These Popular Online Training Courses

Kira Jones

As you’re approaching the end of the Netflix series you’re binging and you’re waiting for your puzzle to arrive in the mail, you might be asking yourself, what should I be doing to fill my time? Well we have a suggestion for you! We...
- 23 Apr 2020
Breakfast Bytes: 15 Years Ago Today, the First Video Was Uploaded to YouTube

Paul McLellan

As it says in the title to this blog post, the first video was uploaded to YouTube 15 years ago today, April 23, 2005 at 8:31pm Pacific time. It was called Me at the zoo and was uploaded by Jawed Karim, one of the co-founders of YouTube (along with&...
- 23 Apr 2020
定制IC芯片设计 : Virtuoso视频日记: “Training bytes” 助推知识传播—第2部分

Dishika Majumdar

通过此博客，您可以了解Cadence Education Service 的相关信息，其中包括Virtuoso 各产品的培训计划及安排，以及如何获取Cadence 技术或技能认证的指南。
- 23 Apr 2020
Life at Cadence: Cheers to the Next 50

TramN

Today, Earth Day celebrates 50 years of support for environmental protection around the globe, a movement spearheaded by US Senator Gaylord Nelson in 1970. Earth Day is the world’s largest civic event celebrated by 192 countries annually...
- 22 Apr 2020
Breakfast Bytes: Legato: Making the Bathtub Wider and Deeper

Paul McLellan

Yesterday's post Automotive Reliability: The Bathtub Curve introduced automotive reliability and how transistors suffer from early life failure, hopefully nothing in mid-life, and then aging and wearout. This is summarized in the diagram be...
- 22 Apr 2020
System, PCB, & Package Design : BoardSurfers: Training Insights - Fundamentals of PDN for Design and PCB Layout

mrigashira

What is a Power Distribution Network (PDN) after all but resistance, inductance, and capacitance in the PCB and components? And, of course, it is there to deliver the right current and voltage to each component on your PCB. But is that all? Are there oth...
- 21 Apr 2020
System, PCB, & Package Design : IC Packagers: You Can Leave Your (Molding) Cap On…

Tyler

Molding caps aren’t something we talk about too frequently around here. We all know they exist, and they serve an important purpose of protecting the delicate die from potentially harsh environmental conditions. They impact how well heat can be...
- 21 Apr 2020
Breakfast Bytes: Automotive Reliability: The Bathtub Curve

Paul McLellan

There are a lot of aspects of automotive reliability. The same goes for aerospace and medical, which have additional issues, too, so I'm going to focus on automotive. I'm also going to focus on semiconductor reliability, although obviously other com...
- 21 Apr 2020
Breakfast Bytes: Fourth 4G Network Goes Live in Japan

Paul McLellan

So your first thought on reading the title to this post might be that having to stay at home has finally got to me and made my brain turn to mush. Or perhaps that I'm really, really short of material to write about. After all, isn't 5G the n...
- 20 Apr 2020
PCB、IC封装：设计与仿真分析: 极致PCB设计全流程 I 技巧二：有效利用格点系统

SDA China

在PCB设计过程中，一些工具使用技巧的掌握，能够让我们的设计事半功倍。 “极致PCB设计全流程”——第二期技巧篇：“有效利用格点系统”将跟大家分享“env+快捷键设置+格点系统”的联合应用，不仅使设计更加便利、高效，还能确保PCB中相同模块的设计一致性。关注微信公众号“Cadence楷登PCB及封装资源中心”，在微信后台回复关键词“PCB全流程”即可...
- 19 Apr 2020
Breakfast Bytes: Sunday Brunch Video for 19th April 2020

Paul McLellan

www.youtube.com/watch Made in my living room (camera Carey Guo) Monday: John Park Webinar: Is It the Age of the Chiplet? Tuesday: The Furthest Man Has Been from Earth Wednesday: HiFi DSPs - Not Just for Music Anymore Thursday: Bringing Clarity o...
- 19 Apr 2020
Breakfast Bytes: It's a SLAM Dunk Programming the Vision Q7 DSP

Paul McLellan

The Tensilica Vision Q7 DSP is the sixth-generation vision and AI DSP. It has an enhanced instruction set and additional hardware for SLAM applications. Cadence has a SLAM library that is optimized for the Vision Q7 DSP and lets SLAM applications be...
- 17 Apr 2020
Analog/Custom Design: Start Your Engines: AMSD Flex—Take your Pick!

Qingyu Lin

Introduction to AMSD Flex mode and its benefits.
- 16 Apr 2020
Verification: Metamorphic Testing: The Future of Verification?

XTeam

Curious about what’s going on behind the scenes with verification? Bernard Murphy, Jim Hogan, and our own Paul Cunningham are on the case with the “Innovation in Verification” blog stream over at semiwiki.com. Every month, this trio reviews a newly-published paper in academia that pertains to verification and discusses its implications. Be sure to stop by—it’s a great place to see what might be coming…
- 16 Apr 2020
Digital Design: Library Characterization Tidbits: Rewind and Replay

Jommy

A recap of the blogs published in the Library Characterization Tidbits blog series.
- 16 Apr 2020
System, PCB, & Package Design : BoardSurfers: Five Easy Steps to Create Footprints Using Packages in Library Creator

Sanjiv Bhatia

In my previous blog, I talked about creating a footprint using an existing template in Allegro ECAD-MCAD Library Creator and explained how easily you can access an existing template and create a package from it by just clicking a button. In this blog...
- 16 Apr 2020
Breakfast Bytes: Bringing Clarity of Signal to High-Performance Connector Design

Paul McLellan

I recently wrote a white paper on Signal Integrity for 112G, which I'll post about once it is available for general download. I covered a broad range of Cadence technology from 112G SerDes design IP (DIP), to IBIS and AMI models for the channel, to ...
- 16 Apr 2020
Analog/Custom Design: Virtuosity: Concurrently Editing a Hierarchical Cellview

Sucharita

This blog discusses key features of concurrently editing a hierarchical cellview.
- 15 Apr 2020
Breakfast Bytes: HiFi DSPs - Not Just for Music Anymore

Paul McLellan

When the Tensilica HiFi DSP family was first created, the focus was all on low-power high-fidelity music. Hence the name of the product. I've written about this over the years: Dolby Atmos and Tensilica Movie Theater Sound in Your Phone So in that...
- 15 Apr 2020
Whiteboard Wednesdays: Whiteboard Wednesdays - TensorFlow to RTL with High-Level Synthesis

References4U

In this week’s Whiteboard Wednesdays video, Dave Apte explains the flow from a TensorFlow description of a machine-learning network to a high quality RTL implementation by leveraging Cadence’s Stratus HLS solution.

https://youtu.be/KXHL4i1WdXQ
- 14 Apr 2020

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