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PCB、IC封装：设计与仿真分析: 升级到Allegro 17.4的10大理由

TeamAllegro

工欲善其事，必先利其器！为何不能错过Cadence Allegro 17.4 ？十大理由告诉你。更加自动化的超实用功能助力打通智能电子设计任督二脉。 1. 整合前后端走线规则管理器业界首款单一规则管理器（ Constraint Manager ）整合前后端设计流程，无论在电路设计或布线阶段，也不需转换Constraints，使用者可在电路图中轻松取得可用於空间规划、元件摆放和交互式布线的设计规范，确保设计准确性。 2. 自动化可靠度验证功能进阶电路逻辑检测和电应力分析功能，...
- 7 May 2021
PCB、IC封装：设计与仿真分析: 六层PCB的漏斗设计

TeamAllegro

电气工程师尼古拉·特斯拉（Nikola Tesla）曾声称自己发明了一种带电粒子束投影仪——或者用科幻术语来说——离子炮（ion cannon）。这是一种防御性武器，可以在一个国家周围形成一堵力场墙。尽管，特斯拉从未成功建造起这样一堵墙，但该结构会激发起一股使人敬畏的力量。想象一下，高高的柱子支撑着近球形圆顶。特斯拉的方案表明，柱子将围绕一股电离气流，而球形圆顶在塔的周围始终保持电荷。如果一架敌机出现在200英里以外，一台像大炮一样...
- 7 May 2021
Analog/Custom Design: Virtuoso Video Diary: Knowledge Booster Training Bytes - Part 7: The Virtuoso ADE Product Suite

Parula

This blog shows how to efficiently use the Virtuoso ADE Assembler and Virtuoso ADE Explorer by using the available assistants in the Assembler and setting up a Monte Carlo run in the ADE Explorer.
- 7 May 2021
Computational Fluid Dynamics: This Week in CFD

John Chawner

It's Friday which means it's time for that weekly roundup of news from the CFD world including industry announcements, event updates, cool applications, and more. This week finds an uptick in hypersonic and built-environment applicatio...
- 7 May 2021
Computational Fluid Dynamics: Hello, CFD Meshing World!

John Chawner

For the third time*, I find myself writing the obligatory, "Hello, World!" first blog post. So "Hello" to all you readers of Cadence's Computational Fluid Dynamics blog. (Or as someone else put it, Cadence Fluid Dynamics.) Who...
- 6 May 2021
Digital Design: What’s Inside the GUI-Based Timing Report in Genus? Want to Explore?

Neha Joshi

Timing closure is one of the most crucial steps of a digital design. Therefore, to meet timing at the later stages of design signoff, it is imperative to consider timing analysis within the synthesis stage.

We know real designs are complex, and so is the timing analysis. Unfortunately, we cannot reduce the complexity, but we can make the ride smooth during the timing analysis journey!!

The trick is to use a GUI-based…
- 6 May 2021
Breakfast Bytes: Sunday Brunch Video for 2nd May 2021

Paul McLellan

https://youtu.be/1HEd6JCriCQ Made in Groveland CA (camera Carey Guo) Monday: Package Assembly Design Kits Tuesday: Rapid Adoption of the Arm Server-Class Processors Wednesday: Arm V9A Thursday: Offtopic: Miniatur Wunderland Friday: no post Featured P...
- 2 May 2021
System, PCB, & Package Design : IC Packagers: Analyze, Simulate, and Resolve Signal Integrity Issues Using In-Design Analysis Flows

avijeet

In today's ever-shrinking IC Package design cycles, it is almost imperative that we catch and correct routing issues as early as possible, which makes simulation an integral part of the design cycle. Layout engineers want a quick and accurate way to ...
- 1 May 2021
中文技术专区: 向SiP过渡，EDA大有可为！

FormerMember

芯片设计可谓是人类历史上最细微也是最宏大的工程。它要求把上千亿的晶体管集成到不到指甲盖大小的面积上，这其中 EDA 工具的作用不可或缺。它于芯片设计就如同编辑文档需要的 Office 软件，是电子工程师设计电路、分析电路和生成电路的重要途径。如今，在电子产品愈发小型化、集成化的趋势下，芯片正在从系统芯片（SoC）向系统级封装（SiP）的设计方法过渡，以往只在消费电子中应用的封装技术，现已逐渐渗透拓展至工业控制、智能汽车、云计算、医疗电子等诸多新兴领域。对于 SiP 市场的迅速崛起，Cadenc...
- 29 Apr 2021
Breakfast Bytes: Offtopic: Miniatur Wunderland

Paul McLellan

Tomorrow and Monday are Cadence Global Holidays. Of course, May 1 is a holiday anyway, in much of the world (China takes the whole week, and it is a holiday in India and Indonesia too—so that gets you a lot of the way there). I am actually taki...
- 29 Apr 2021
Verification: What Disruptive Changes to Expect from PCI Express Gen 6.0

Claire Ying

PCIe (Peripheral Component Interconnect Express) has long been the backbone of complex systems, and provides a high-bandwidth, high-performance link for interconnecting devices imposed by cloud-based computing power, storage capacity network ban...
- 28 Apr 2021
Breakfast Bytes: Arm V9A

Paul McLellan

Yesterday, I wrote about rapid adoption kits (RAKs) for the latest Arm server-class processors. But it is only a few weeks ago that Arm announced the latest iteration of its instruction set architecture (ISA), V9A. It is obviously an exaggeration to ...
- 28 Apr 2021
カスタムIC／ミックスシグナル: Virtuoso Meets Maxwell: ICパッケージングプロセスのためのダイとBGAパッケージ間の接続の作成

Custom IC Japan

'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC...
- 27 Apr 2021
Breakfast Bytes: Rapid Adoption of the Arm Server-Class Processors

Paul McLellan

Arm has been moving from its foundational base in mobile into the data center, with server-class processors under the name Neoverse. Initially, there was the Neoverse-N1 processor. In addition, some hyperscale companies have been designing ...
- 27 Apr 2021
System, PCB, & Package Design : ASCENT: Finding the Right Parts with Unified Search

Rachna2018

Some people say that finding the right components for a design is the most time-consuming part of designing. If that is correct, you need all the help you can get to quickly locate what you need. You might need a specific type of component, a specifi...
- 27 Apr 2021
Analog/Custom Design: Spectre Tech Tips: Introducing Electrothermal Simulation

Fred Yang

Understanding the thermal performance of integrated circuits has been essential to avoid the overheating that can cause circuit malfunctions. With greater integration, the power dissipation in integrated circuits is becoming increasingly impor...
- 26 Apr 2021
Computational Fluid Dynamics: Thermal Analysis of a Hardware Blade System

Paul McLellan

Here's a video titled Thermal Analysis of a Hardware Blade System. The "blade system" is Cadence's Protium FPGA prototyping system. Not the X2 that we announced a few weeks ago, but the X1. The thermal analysis is done using Cadence's Celsius tool. Y...
- 26 Apr 2021
Breakfast Bytes: Package Assembly Design Kits

Paul McLellan

At the recent IMAPS conference, Cadence's John Park presented on Package Assembly Design Kits: What are they and how they can benefit the packaging community. John started by looking at some history and trends in the market, since heterogene...
- 26 Apr 2021
Breakfast Bytes: Sunday Brunch Video for 25th April 2021

Paul McLellan

https://youtu.be/ZuxS3yM7RCw Made at Communication HIll, San Jose (camera/drone me) Monday: Update: Pointwise, PCIe, RISC-V Tuesday: Brian Jackson Introduces a Mystery Product at IMAPS (Shh, It's OrbitIO) Wednesday: Embracing a Zero Tru...
- 25 Apr 2021
Verification: What Is New in the Latest AMBA 5 ACE, AXI and AHB Protocol Specification Updates?

DimitryP

The industry-standard ARM AMBA® 5 protocol specifications continue to evolve, further improving performance and efficiency of key ARM architecture features. Besides the updates of powerful AMBA CHI (Coherent Hub Interface) specification with Issue D and Issue E features (which will be discussed in-depth in upcoming blogs), ARM invested in updating their highly successful and very popular AMBA AXI, ACE and AHB on-chip…
- 23 Apr 2021
Computational Fluid Dynamics: This Week in CFD

Paul McLellan

This week’s compilation of CFD news begins with a must-read article on how to choose colors properly when visualizing data. AI comes up twice this week as does Fortran which makes one wonder whether anyone’s programming AI in Fortran. The...
- 23 Apr 2021
Digital Design: Pegasus: Get Your Wings: Strong Immunity Makes Pegasus Fault Tolerant

Sarita Sharma

We all know the importance of good immunity and how a good immune system makes you strong. Pegasus is a strong tool which is immune to various types of failures that could occur in a typical compute environment such as network failures, disk issues, ...
- 23 Apr 2021
Breakfast Bytes: Dover and Cadence: Lessons Learned from SolarWinds

Paul McLellan

I recently attended a webinar with presenters from Dover, Cadence, and a mystery guest who was just a silhouette with the name Michael. The title was Lessons Learned from SolarWinds: How to Limit the Scope and Damage of Software Supply Chain Attacks....
- 23 Apr 2021
Breakfast Bytes: Tensilica Vision Q8 and P1 DSPs, More AND Less

Paul McLellan

President George H. W. Bush famously said that he didn't do "the vision thing". Well, here at Cadence we definitely do the vision thing. In fact, the Tensilica Vision DSP product line is the market leader in the vision thing. Until this week, the pri...
- 22 Apr 2021
Digital Design: Low-Power Implementation Training Videos

VNelson

This blog post describes the Low Power Implementation Flow and IEEE 1801 basic terminologies to help understand the low power designs.
- 21 Apr 2021

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