• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Community Forums
  3. Cadence Community
Cadence Community
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • Site
  • Search
  • User
Find Other Members ►
Subscriptions
Get email delivery of the Cadence blog (individual posts).
  • Twitter
  • Facebook
  • LinkedIn
  • Google+

Community


Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

  • Computational Fluid Dynamics: This Week in CFD

    John Chawner
    John Chawner
    It's a Global Recharge Day here at Cadence so why not get recharged by keeping up with the latest news in CFD? For those of you who are readers, there are several good reads this week. (You'll have to click through for the links.) The CFD Vi...
    • 30 Jul 2021
  • Analog/Custom Design: Spectre Tech Tips: Spectre High Impedance Node Check Overview

    Amaninder
    Amaninder
    Circuit checks enable you to analyze typical design problems, such as high impedance nodes, leakage paths between power supplies, timing errors, power issues, connectivity problems, or extreme rise and fall times. In this blog, we'll discuss the high impedance node checks available in Spectre and when to use each check.
    • 29 Jul 2021
  • System, PCB, & Package Design : System Analysis Knowledge Bytes: Computational Fluid Dynamics Roundup – July 2021

    deeptik
    deeptik
    Welcome to the Computational Fluid Dynamics Roundup series, your monthly roundup of the top news and blogs in the CFD domain at Cadence.
    • 29 Jul 2021
  • System, PCB, & Package Design : ASCENT: Reasons to Move to 17.4-2019 Hotfix 019

    Rachna2018
    Rachna2018
    “The only constant in life is change” nowhere is this adage truer than in the world of software. Updates, releases, patches … They are a part of our lives as experts work behind the scenes to constantly improve and fine-tune what w...
    • 29 Jul 2021
  • System, PCB, & Package Design : IC Packagers: Reuse Wirebond Placement with Place Replicate Modules

    avijeet
    avijeet
    Most package designs have wire bonding and reusing the wire bond information for other similar dies placed in the design significantly improves the efficiency and reduces the turnaround time. Allegro Package Designer Plus provides Place replicat...
    • 29 Jul 2021
  • Analog/Custom Design: Virtuosity: More Usability Enhancements in Virtuoso ADE Assembler and Virtuoso ADE Explorer

    Arja H
    Arja H
    We've been busy improving the usability of the Analog Design Environment products Virtuoso ADE Assembler and Virtuoso ADE Explorer over the recent releases. Click here to check out some of these usability updates that have been added between IC6.1.8/ICADVM20.1 ISR13 and ISR18 in this blog.
    • 29 Jul 2021
  • Computational Fluid Dynamics: Pipistrel Mitigates Aviation Noise Emissions for Electric Aircraft

    AnneMarie CFD
    AnneMarie CFD
    Pipistrel is a world-leading designer and manufacturer of small aircrafts specializing in energy-efficient   and affordable high-performance aircraft. The first company to fly an electric two-seater in 2007 and the winner of the ...
    • 29 Jul 2021
  • Breakfast Bytes: Offtopic: Immersive Vincent van Gogh

    Paul McLellan
    Paul McLellan
    Cadence has a global holiday tomorrow and Breakfast Bytes will not appear. Back on Monday. Did you see the (excellent) Netflix show Emily in Paris? In one episode, the characters go to see a show which is called Immersive van Gogh. In Paris, it opene...
    • 29 Jul 2021
  • System, PCB, & Package Design : Welcome to the System Analysis Knowledge Bytes Blog Series

    KamalKishore
    KamalKishore
    Welcome to the System Analysis Knowledge Bytes blog series! The first blog in this series focusses on providing a high-level overview of the System Analysis solution offerings from Cadence. It will also provide information about the type of content that you can expect to see in the forthcoming blogs.
    • 28 Jul 2021
  • カスタムIC/ミックスシグナル: Virtuosity: .simrc ファイルとネットリストのカスタマイズの裏側にある謎

    Custom IC Japan
    Custom IC Japan
    ネットリスティングはデザインシミュレーションにおいて不可欠な部分です。ネットリストは、望ましいシミュレーション結果を達成するためにシミュレータにコネクティビティとマッピングの情報を伝えるために作成します。しかしながら、デフォルトのネットリストを使用する代わりにいくつかのカスタマイズを加えたネットリストを使用したい場合があります。どうしたらいいでしょう? シミュレーション環境のいくつかの設定を変更したい場合、.simrcファイルをカスタマイズします。 .simrcファイルとは何か?なぜ必要か? ....
    • 28 Jul 2021
  • Computational Fluid Dynamics: The CFD Vision 2030 Roadmap: 2020 Status, Progress, and Challenges

    John Chawner
    John Chawner
    After a long writing (and longer editing and approval seeking) process, the AIAA's CFD Vision 2030 Integration Committee has published its first update to the Vision's roadmap. This 71 page, thoroughly cited report assesses progress toward th...
    • 28 Jul 2021
  • Breakfast Bytes: July Update

    Paul McLellan
    Paul McLellan
    This is the July edition of the now monthly update post, with small updates to existing posts and themes that don't justify a whole Breakfast Bytes post on their own. Cadence is off for a global recharge day on Friday, so Breakfast Bytes will not...
    • 28 Jul 2021
  • Breakfast Bytes: Designed with Cadence Video Series

    Paul McLellan
    Paul McLellan
    Designed with Cadence is a video series made with Cadence customers about how they used Cadence technology to design real products. Each video is about two to three minutes long. There are currently more than 20 of them, with new ones being added eve...
    • 27 Jul 2021
  • Breakfast Bytes: HOT CHIPS 2021 Preview

    Paul McLellan
    Paul McLellan
    As usual in August, it is HOT CHIPS. I always find this one of the most interesting conferences of the year. It gives a lot of insight into the specific products being presented, but also a feel for what technologies are being used for the most advan...
    • 26 Jul 2021
  • 中文技术专区: 6G时代来了,我们应该为设计准备什么?

    FormerMember
    FormerMember
    7月22日至23日,为期两天的“电子设计创新大会(EDICON China 2021)”在上海博雅酒店成功举行,本次大会汇聚了业界一众技术专家与企业领袖,与大家共同探讨最前沿的技术与最新行业发展趋势。 作为EDICON China钻石赞助商,Cadence受邀参加本次会议,并带来了3场技术演讲。其中,Cadence公司副总裁兼系统仿真事业部总经理顾鑫(Ben Gu)先生在7月22日上午的会议中,为我们带来了题为“5G/6G系统设计与分析”的重磅演...
    • 26 Jul 2021
  • RF /マイクロ波設計: μWaveRiders:Cadence AWR Design Environment V16 ソフトウェアのリリースをハイライト

    RF Design Japan
    RF Design Japan
    Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。    AWR Design Environment V16 ソフトウェア...
    • 25 Jul 2021
  • Breakfast Bytes: Sunday Brunch Video for 25th July 2021

    Paul McLellan
    Paul McLellan
    https://youtu.be/cwT7KL4iShY Made on "a tropical beach" Monday: Aerospace and Defense Systems Day...and DAU Tuesday: 75 Years of the Microprocessor Wednesday: CadenceLIVE Cloud Panel Thursday: Cerebrus: The Future of Intelligent Chip D...
    • 25 Jul 2021
  • RF Engineering: μWaveRiders: Cadence AWR Design Environment V16 Software Release Highlights

    TeamAWR
    TeamAWR
    The Cadence AWR Design Environment V16 production release is now available for download at Cadence Downloads with design environment, AWR Microwave Office, AWR VSS, AWR Analyst, and other enhancements.
    • 23 Jul 2021
  • Computational Fluid Dynamics: This Week in CFD

    John Chawner
    John Chawner
    Given that I'm perpetually late on sharing This Week in CFD here on the Cadence CFD blog, I ought to start calling it This Weekend in CFD or Last Week in CFD. But now that we're here... What does a DNS computation on 450,000 cores and a CFD...
    • 23 Jul 2021
  • System, PCB, & Package Design : BoardSurfers: Accelerating Allegro Layout Tools Using NVIDIA GPUs for Complex Board Designs

    pbernard
    pbernard
    Boards and Packages are getting extremely complex and large; what used to be considered large with millions of objects is now close to 100s of millions of objects. Traditional rendering on CPU of such large and complex designs is not scalable for tod...
    • 23 Jul 2021
  • System, PCB, & Package Design : BoardSurfers: Installation Know-How: Download Manager – Better than Ever Before

    Shikha Jain
    Shikha Jain
    The Download Manager user interface has been revamped in 17.4-2019 HotFix 019. Various new features are integrated to enhance user experience and efficiency. The latest release of Download Manager delivers modern UI architecture with a scope for future enhancements...
    • 23 Jul 2021
  • Computational Fluid Dynamics: Damen: Wind Study On A Slender Boat Design Using Computational Fluid Dynamics

    AnneMarie CFD
    AnneMarie CFD
    DAMEN and Numeca develop a CFD methodology to proof a vessel has sufficient transversal stability to resist over-rolling in severe side winds. With more than 80 percent of the total global trade being transported through international ship...
    • 23 Jul 2021
  • Breakfast Bytes: Machine Learning in EDA

    Paul McLellan
    Paul McLellan
    Yesterday, in my post Cerebrus: The Future of Intelligent Chip Design, I talked about our latest product to use machine learning (ML) techniques to great effect. Although they are all slightly different, machine learning is also known as artificial i...
    • 23 Jul 2021
  • System, PCB, & Package Design : Cadence OrCAD and Allegro 17.4-2019 HotFix SPB17.40.019 is Now Available

    AllegroReleaseTeam
    AllegroReleaseTeam
    The HotFix 019 (QIR 3, indicated as 2021.1 in the application splash screens) update for Release 17.4-2019 of OrCAD and Allegro products is now available at Cadence Downloads. This blog post contains important links for accessing this update and introduces s...
    • 22 Jul 2021
  • Breakfast Bytes: Cadence Cerebrus - Intelligent Chip Explorer

    Paul McLellan
    Paul McLellan
    This morning, we announced the Cadence Cerebrus Intelligent Chip Explorer, a machine learning (ML)-based tool that automates and scales digital chip design. If you think about what a designer does with traditional EDA tools, a lot of it is running so...
    • 22 Jul 2021
<>
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information