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Latest Blog Posts

  • Breakfast Bytes: Photonic Integration — From Switching to Computing

    Paul McLellan
    Paul McLellan
    Last Tuesday was the first day of the virtual event CadenceCONNECT: Photonics Contribution to High-Performance Computing. Note that the subtext of this is actually using silicon photonics for performing high-performance computing, not just providing ...
    • 2 Dec 2020
  • System, PCB, & Package Design : IC Packagers: Adding Multiple Component Instances without a Schematic

    Tyler
    Tyler
    More package designers these days, with the increasing component counts and more complicated electrical constraints, are shifting to using a front-end schematic capture tool. As with IC and PCB design, this allows for verification between the logical...
    • 1 Dec 2020
  • Breakfast Bytes: Cadence and Standards...and a New Codec for Your Phone

    Paul McLellan
    Paul McLellan
    A lot of EDA and IP is increasingly based around standards. As a result, Cadence is actively participating in and contributing to standards bodies such as IEEE, JEDEC, Accellera, and Si2 to name a few. Here are the most recent standards that we have ...
    • 1 Dec 2020
  • PCB解析/ICパッケージ解析: Clarity、Celsius、およびSigrityツールの2019 HF4リリース(2020年11月) - 新機能ハイライト

    SPB Japan
    SPB Japan
    Clarity, Celsius, Sigrityツールの2019 HF4プロダクト・リリースがCadence Downloadsサイトからダウンロード可能となりました。2019 HF4リリースにおけるCCRの改修項目は、インストール階層に含まれているREADME.txtをご参照ください。 SIGRITY2019 HF4 以下では、Clarity, Celsius, Sigrityツール - 2019 HF4プロダクト・リリースの主なアップデートをいくつか紹介します。これらの機能や他のすべて...
    • 30 Nov 2020
  • カスタムIC/ミックスシグナル: Start Your Engines: ブログメーターの確認-2周目

    Custom IC Japan
    Custom IC Japan
    Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Enginesブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。 ブログメータ...
    • 30 Nov 2020
  • Learning and Support: The Latest UVM Training Byte from Cadence - Top Five Things That Break with UVM-IEEE (and How to Fix Them).

    BrianD
    BrianD
    Cadence Education Services have released our latest advanced UVM Training Byte (TB) video on support.cadence.com. This TB covers issues when migrating to UVM-IEEE. UVM is the dominant testbench methodology for ASIC and IC design. For many years UVM w...
    • 30 Nov 2020
  • What Is a Capability? CAP, CHERI, and Morello

    Breakfast Bytes: What Is a Capability? CAP, CHERI, and Morello

    Paul McLellan
    Paul McLellan
    At the recent Arm DevSummit, one of the presentations mentioned CHERI and the Arm Morello board in passing. This was in the context of using capabilities (perhaps) in some future Arm processors to increase the amount of memory safety, and to protect ...
    • 30 Nov 2020
  • System, PCB, & Package Design : BoardSurfers: Units, Accuracy, and Artwork - How to Do It Right!

    BarbS
    BarbS
    It might seem simple, but database units and accuracy directly relate to the artwork generated, and it is possible to misunderstand the artwork format as it relates to the board setup. Thirty years ago, databases were set up as Mils (0.0) or Mil...
    • 25 Nov 2020
  • カスタムIC/ミックスシグナル: SPECTRE 20.1 リリースが利用可能になりました

    Custom IC Japan
    Custom IC Japan
    SPECTRE 20.1 リリースは、Cadence Downloadsからダウンロード可能です。   SPECTRE 20.1 サポートされているプラットフォーム、インストール情報、製品ドキュメントへのアクセス方法、およびこのリリースで解決された主要な問題の詳細についてはREADME.txtファイルを参照してください。 SPECTRE20.1リリースで行われた重要な更新の一部を次に示します: Spectre XのSpectreRF解析Spectre Xは、pss、harmonic...
    • 24 Nov 2020
  • カスタムIC/ミックスシグナル: Virtuoso Meets Maxwell: RFモジュールの配線とボンドワイヤのフル3D解析

    Custom IC Japan
    Custom IC Japan
    'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC...
    • 24 Nov 2020
  • Analog/Custom Design: Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 4

    Parula
    Parula
    We live in a complex world where it is essential to use and combine tools and platforms as efficiently as possible with all available features. In this blog, we are happy to show you how easy it can be to get best results using the Spectre Simulation Platform and its corresponding options.
    • 24 Nov 2020
  • Analog/Custom Design: Virtuoso ICADVM20.1 ISR15 and IC6.1.8 ISR15 Now Available

    Virtuoso Release Team
    Virtuoso Release Team
    The IC6.1.8 ISR15 and ICADVM20.1 ISR15 production releases are now available for download.
    • 23 Nov 2020
  • カスタムIC/ミックスシグナル: Start Your Engines: Spectre Xシミュレータでアナログ・ミックスシグナル検証を高速化する

    Custom IC Japan
    Custom IC Japan
    Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Enginesブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。 Bonjou...
    • 23 Nov 2020
  • System, PCB, & Package Design : IC Packagers: How to Define Your Own Team-Certified Wire Profiles

    Tyler
    Tyler
    Back at the start of 2020, we talked about why you shouldn't use the default wire profile in your actual design. Today, I want to take this a step further. If you do wire bond designs, you are doubtless aware of the certified bond wire profiles t...
    • 23 Nov 2020
  • Analog/Custom Design: Virtuoso Meets Maxwell: Enabling System Analysis And Implementation Through Libraries

    Guru Rao
    Guru Rao
    Welcome to a post on how to create component and padstack libraries for use in the Virtuoso platform-driven multiple technology flows. This post describes the tasks of a librarian, who must assemble component IP from various sources and create the views and documentation that can be used by designers.
    • 23 Nov 2020
  • System, PCB, & Package Design : (P)SpiceItUp: Verifying and Optimizing Designs with PSpice A/D

    Shailly
    Shailly
    PSpice® A/D is a fully featured analog and mixed-signal simulator that can be integrated with OrCAD® and Allegro® tools. With PSpice A/D you can improve design functionality and reliability, and also verify the electrical performance of d...
    • 23 Nov 2020
  • Academic Network: Become a Cadence Academic Network Certified Instructor!

    Anton Klotz
    Anton Klotz
    Are you a lab instructor sitting at home right now? Have you completed some Cadence Online Training courses for your education and earned Digital Badges for personal promotion and spicing up your CV on LinkedIn? Well done! You can go even further and...
    • 20 Nov 2020
  • Analog/Custom Design: Virtuosity: Conserve Power—Importing and Exporting Power Intent

    bsachin
    bsachin
    In this blog, I will focus on the key enablers, which are required before the power-aware designs undergo the verification cycle. This is the ultimate test that confirms the robustness and efficiency of a design.
    • 20 Nov 2020
  • Breakfast Bytes: Thanksgiving Off-Topic: Edelweiss

    Paul McLellan
    Paul McLellan
    It's Thanksgiving next week in the U.S. I am taking the whole week off and Breakfast Bytes will not appear. So today is the day before the break and I always indulge myself by writing about something completely off-topic. Let's look at some t...
    • 20 Nov 2020
  • カスタムIC/ミックスシグナル: Spectre Tech Tips: Spectre X アップデート

    Custom IC Japan
    Custom IC Japan
    およそ1年前、SPECTRE 19.1 baseリリースにてSpectre Xシミュレータをリリースしました。それ以来、後続のSPECTRE 19.1 ISRリリースでのSpectre Xでは、多数の改善が行われました。2020年10月初旬にリリースされたSPECTRE 20.1リリースでもSpectre Xに関連するいくつかの大きな改善が含まれています。このブログでは、Spectre Xに関連するアップデートと、SPECTRE 19.1 ISRリリースで提供された改善の概要について紹介します。...
    • 19 Nov 2020
  • Analog/Custom Design: Start Your Engines: Mixed-Signal Modeling Methods for Converting an Electrical Signal to a Real Number

    Andre Baguenie
    Andre Baguenie
    This blog explains how to convert an electrical signal to a real number in your design.
    • 19 Nov 2020
  • Digital Design: Library Characterization Tidbits: Rewind and Replay - 3

    Jommy
    Jommy
    This blog provides a summary of the last five blogs posted in the Library Characterization Tidbits blog series.
    • 19 Nov 2020
  • Breakfast Bytes: RISC-V Summit 2020 Preview

    Paul McLellan
    Paul McLellan
    The third of three events taking place in the first three weeks of December is the RISC-V Summit. The RISC-V Summit takes place from December 8 to 10. You can read my preview posts about the other two December events from earlier in th...
    • 19 Nov 2020
  • Breakfast Bytes: IEDM 2020 Preview

    Paul McLellan
    Paul McLellan
    Every December is the IEEE International Electron Devices Meeting (IEDM). The somewhat unusual name comes about since it has been going for over 60 years and, in the early days, it was all about vacuum tubes (valves in English English), with transist...
    • 18 Nov 2020
  • カスタムIC/ミックスシグナル: Virtuoso Meets Maxwell: Virtuoso RF Solutionのクイックスタート

    Custom IC Japan
    Custom IC Japan
    'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのIC...
    • 17 Nov 2020
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