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Latest Blog Posts

  • Supernaturally Fast Sorting

    Breakfast Bytes: Supernaturally Fast Sorting

    Paul McLellan
    Paul McLellan
    When I was in my mid-teens, I was writing a program (in FORTRAN) that required me to sort an array of a couple of dozen items. I had no idea that there were lots of established algorithms (Quicksort was invented in 1959 for example). We had almost no...
    • 28 Sep 2021
  • Spotlight Taiwan: 2021 CadenceLIVE Taiwan系統設計與分析(System Design and Analysis) 助力系統設計研發戰力

    candyyu
    candyyu
    隨著5G、AI、工業物聯網(IIoT)、自駕車和超大規模(hyperscale)運算等技術的需求,電子設計也朝更高整合度和多樣化垂直應用發展,為半導體產業帶來了新商機。正因為系統設計複雜度遽增,我們需要突破傳統的新思維與做法,以「超越晶片」的全流程設計,才能夠快速、準確、全面性地克服日益嚴苛的系統級分析與設計挑戰。為此,在今年 CadenceLIVE Taiwan大會上Cadence特別規畫了『系統設計與分析(System Design and Analysis)』議程,除了由Cadence研發...
    • 27 Sep 2021
  • Breakfast Bytes: Tempus: Design Robustness

    Paul McLellan
    Paul McLellan
    The latest release of the Tempus Timing Signoff Solution, 21.1, contains a lot of new capabilities. There are far too many to cover in a single blog post—the customer presentation on Tempus is 90 slides long. Obviously, that goes into a lot mor...
    • 27 Sep 2021
  • System, PCB, & Package Design : ASCENT: Team Collaboration in Allegro System Capture

    Auromala
    Auromala
    I know it and you know it. Electronic design cycles are a challenge. All that back and forth between designers, board engineers, CAD librarians, mechanical designers, suppliers, manufacturers, and component engineers can be difficult to manage. Typic...
    • 27 Sep 2021
  • Breakfast Bytes: Sunday Brunch Video for 26th September 2021

    Paul McLellan
    Paul McLellan
    https://youtu.be/Ivi2dTIcm9E Made at my garden gate (camera Carey Guo) Monday: Ten Lessons from Three Generations of Google TPUs Tuesday: At a Digital Crossroads Wednesday: Announcing Helium, Hybrid and Virtual Platforms with Multiple Gears Thur...
    • 26 Sep 2021
  • PCB、IC封装:设计与仿真分析: 如何从倒装芯片的角度设计封装

    TeamAllegro
    TeamAllegro
    本文作者:Tyler Lockman,Cadence Software Architect,于加拿大卡尔顿大学获计算机科学学士学位后,在Cadence Allegro产品部门工作超过20年,专注于IC封装与中介层基板设计。同时,参与全Allegro平台、Virtuoso、PVS、OrbitIO及 Innovus产品的核心工作。 space 大多数封装基板的设计设想是基于如果零件安装在正面,那么封装基板就会置于主 PCB 上。这意味着,BGA 的焊球位于横截面的底层、裸片安装在上面。 对于引线键合...
    • 24 Sep 2021
  • Computational Fluid Dynamics: This Week in CFD

    John Chawner
    John Chawner
    It's Friday meaning it's time for another roundup of CFD news and detritus from the internet. Three highlights to whet your appetite: An article about automobile design makes the point that they are now complex systems versus not t...
    • 24 Sep 2021
  • Breakfast Bytes: September Update: Ransomware, Apple, Zero Trust, and More

    Paul McLellan
    Paul McLellan
    It's only September 24, but this is the last Friday of the month so it's time for my monthly update. This month: ransomware, Apple's new A15 chip, the US government and zero trust, plus more Designed with Cadence videos. Ransomware Ransom...
    • 24 Sep 2021
  • RF /マイクロ波設計: μWaveRiders: INTRCONNを使用したシステムレベルでのPCB配線効果のモデリング

    RF Design Japan
    RF Design Japan
    Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。 このシリーズの新しいブログに関する通知を受け取るために、Subscribe Nowをクリック...
    • 23 Sep 2021
  • RF Engineering: μWaveRiders: Modeling PCB Trace Effects at the System Level with INTRCONN

    TeamAWR
    TeamAWR
    The Team RF "μWaveRiders" blog series is a showcase for Cadence AWR RF products. Monthly topics will vary between Cadence AWR Design Environment release highlights, feature videos, Cadence Academic Network news (now includes the former A...
    • 23 Sep 2021
  • Breakfast Bytes: Why You Should Attend CadenceLIVE Europe in October

    Paul McLellan
    Paul McLellan
    CadenceLIVE Europe is on October 19 and will be a digital event. Let me give you a preview of what is coming up and some reasons to attend. As usual, there are keynotes, technical updates, presentations mainly by customers, an expo...and even giveawa...
    • 23 Sep 2021
  • 中文技术专区: μWaveRiders: Cadence AWR Design Environment V16 核心优势

    TeamAWR
    TeamAWR
    AWR Design Environment V16 产品版本已上线并可从 Cadence Downloads 网页下载,其中包含以下和其它增强功能
    • 22 Sep 2021
  • Breakfast Bytes: Announcing Helium, Hybrid and Virtual Platforms with Multiple Gears

    Paul McLellan
    Paul McLellan
    This morning Cadence announced the release of the Helium Virtual and Hybrid Studio. This is a next-generation engine for hardware/software co-verification and debug. The full virtual model provides the highest performance for software development and...
    • 22 Sep 2021
  • Verification: Verification of Integrity and Data Encryption(IDE) for PCIe Devices

    Sangeeta Soni
    Sangeeta Soni

    The concept of Trusted Execution Environments (TEE) was developed in the early 2000s to standardize key encryptions, end-to-end security and authenticity, and confidentiality of devices in a system. With the increase in computing and connected devices due to IoT, there are large number of applications which are installed or accessed by users in a server or mobile resulting in an increased probability of data being compromised…

    • 22 Sep 2021
  • Student Special - Get Your Omnis License and Earn A Cadence Certificate in This Free Online CFD Course!

    Computational Fluid Dynamics: Student Special - Get Your Omnis License and Earn A Cadence Certificate in This Free Online CFD Course!

    AnneMarie CFD
    AnneMarie CFD
    The Basics of CFD in 8 Weeks - Free Online Course Learn the basics of CFD in eight classes across eight weeks and gain hands-on experience using commercial, flow-simulation software! Lasting approx. 45 minutes per class, take part in each ...
    • 22 Sep 2021
  • System, PCB, & Package Design : BoardSurfers: Detecting Potential Component Lead Assembly Issues

    Boopathy J
    Boopathy J
    Placing component leads accurately as per the datasheet is an important task while creating a package footprint symbol. As the pin pitch goes down, the size and location of the component lead play a crucial role in the assembly of the components. The...
    • 21 Sep 2021
  • Verification: Training Insights - Addressing Security Verification Requirements with JasperGold SPV App

    Nizar Hanna
    Nizar Hanna

    As a chip designer, you’re probably spending as much headspace on security threats as you are on traditional challenges like power, speed, and functionality. Recent microarchitectural vulnerabilities like “Meltdown” and “Row Hammer” that expose secure information like decryption keys were found only in post silicon after tape out. This shows that conventional simulation-based verification is insufficient to address…

    • 21 Sep 2021
  • Breakfast Bytes: At a Digital Crossroads

    Paul McLellan
    Paul McLellan
    Politico is not usually a place I go for material for this blog, but recently it had a Politico Tech Summit called At a Digital Crossroads. One session was sponsored by Micron (I think that's how it works) and featured the chairwom...
    • 21 Sep 2021
  • Computational Fluid Dynamics: This Week in CFD

    John Chawner
    John Chawner
    As it seems to be becoming a (bad) habit, This Week in CFD is presented here as Last Week in CFD. But that doesn't make the news any less relevant. Great article on wind tunnels because they go hand-in-glove with CFD. Monica Schnitger (who you r...
    • 20 Sep 2021
  • Digital Design: Do you want to Flaunt your Expertise? Grab the Digital Badge Today!

    Neha Joshi
    Neha Joshi

    When you achieve the credit for proficiency, do you want to show it to the world?

    We know it isn’t easy to carry the actual physical badge (certificate) everywhere today. Why? Expenses, pandemic, making a list where to travel, to whom to show etc.

    Don’t worry! We have an easy and cost-free solution for this. Become Cadence Certified with Digital Badges. How?

    We have introduced courses for Digital Badge Exams…

    • 20 Sep 2021
  • Breakfast Bytes: Ten Lessons from Three Generations of Google TPUs

    Paul McLellan
    Paul McLellan
    In my post about the big trends from this year's HOT CHIPS, I mentioned a paper from ISCA written by a group of people from Google. The paper is not actually titled exactly as in the title to this blog post, it is actually Ten Lessons From Three ...
    • 20 Sep 2021
  • The India Circuit: Mentor Story: Raj Gutta - Cadence Scholarship Program

    Asim Khan
    Asim Khan
    The Cadence Scholarship Program is the flagship CSR program of Cadence India, introduced five years ago. Many meritorious students from under-served sections of society drop out of the education system after school because of the lack of finances. Th...
    • 20 Sep 2021
  • Breakfast Bytes: Sunday Brunch Video for 19th September 2021

    Paul McLellan
    Paul McLellan
    https://youtu.be/LuFCfy3aNbI Made with Lumen5 by me Monday: On-Device Artificial Intelligence the Tensilica Way Tuesday: How to Build a Data Center: It's All About the SerDes...and Thermal Wednesday: Pegasus Flies into the GF Technology Summ...
    • 19 Sep 2021
  • System, PCB, & Package Design : BoardSurfers: Have You Heard About Computational Fluid Dynamics Yet?

    deeptik
    deeptik
    A guest blog to take your focus away from normal news and feature information that you are accustomed to reading about in the world of PCB Design blogs to let you know about Cadence’s recent ventures into the world of Computational Fluid Dynamics.
    • 17 Sep 2021
  • Breakfast Bytes: HOT CHIPS: The Big Trends

    Paul McLellan
    Paul McLellan
    Two big trends that are no surprise, they were big at HOT CHIPS last year and for other events like the Linley Processor Conferences, are every processor is an AI processor, and increasingly most processors are using some form of advanced packaging. ...
    • 17 Sep 2021
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