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AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso
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Blog - Post List

Latest blogs

Analog/Custom Design

Video Demo: Spectre Turbo - Fasten your Seatbelts!!

Although Spectre Turbo was released back in April, I hadn't found time to fully tinker…

• 1 min read

Verification

Embedded Software Bugging and Debugging

In one of my previous posts I introduced an interesting book titled Dreaming in Code…

• 4 min read
bugging and debugging' , System Design and Verification , embedded software

Verification

Getting more value from the OVM using Metric-Driven Verification

With all of the momentum around the OVM these days there has been a lot of good discussion…

• 2 min read
SystemVerilog , Verification methodology , metric driven verification (MDV) , Functional Verification , Open Verification Methodology , Testbench simulation , OVM , Coverage-Driven Verification , CDV , Enterprise Manager , coverage driven verification (CDV) , eRM

Verification

Verification community comes together to talk tech

I just finished the week at Cadence's CDNLive User Group in San Jose. Over the past…

• 1 min read
SystemVerilog , Verification methodology , CDNLive , metric driven verification (MDV) , Functional Verification , CDNLive San Jose 2008 , Formal Analysis , Open Verification Methodology , Testbench simulation , OVM , Coverage-Driven Verification , CDV , Enterprise Manager , ISX (Incisive Software Extensions) , Simulation acceleration , coverage driven verification (CDV) , ISX , eRM , System Verification

Verification

A few thoughts on CDNLive! and OVM 2.0

My colleague Joe Hupcey has been keeping you informed and entertained with information…

• 1 min read
CDNLive San Jose 2008 , OVM 2.0

Verification

OVM 2.0 -- Short Technical Review

By now you may have seen the official announcement of the OVM 2.0 release . So what…

• 3 min read
SystemVerilog , Verification methodology , OVM , CDV , System Verification , OVM 2.0

Verification

Day 3 of CDNLive San Jose

Highlights of Day 3: papers all morning, lunch, then closing remarks. Comments on…

• less than a min read
verification strategy , Verification methodology , CDNLive , metric driven verification (MDV) , Functional Verification , CDNLive San Jose 2008 , Multi-domain verification: HW/SW co-verification , Enterprise Manager , ISX (Incisive Software Extensions) , Plan and metrics management , Verification IP modeling , ISX

Digital Design

Running SoC-Encounter...from an iPhone

Hello from CDNLive Silicon Valley 2008! I've had a great few days out here interacting…

• less than a min read
SoC-Encounter , iPhone Cisco VPN Client , Mocha VNC Lite , iPhone

System, PCB, & Package Design 

CDNLive! Track 8 - The Place to Be!

Lively presentation on IBIS-AMI modeling, multi-gigabit package design, 3D field…

• less than a min read
CDNLive , cadence , SPB , SPB16.2 , wirebond profile library , Kulicke & Soffa

Verification

Day 2 of CDNLive San Jose 2008

Highlights of Day 2: more great papers (with enough customer papers on OVM fill almost…

• less than a min read

System, PCB, & Package Design 

CDNLive! 2008 - San Jose: Day 3 ... Product Roadmaps, More Presentations, and Poker…

From the floor of CDNLive! 2008 - San Jose Each day continues to show the value that…

• 2 min read
CDNLive! 2008 , PCB design

Verification

Day 1 of CDNLive San Jose 2008

Suffice to say, Day 1 was quite a full day, with the highlight for me being some…

• less than a min read
AMS , CDNLive San Jose 2008 , Multi-domain verification: HW/SW co-verification , multi-language

System, PCB, & Package Design 

CDNLive! 2008 - San Jose: Day 2 ... Welcome, Keynote Speakers, Presentations

From the floor of CDNLive! 2008 - San Jose Wow! What an exciting, power packed, and…

• 1 min read
CDNLive! 2008 , PCB design , Michael Catrambone

Verification

Enterprise Verification gets a boost (a big one!)

Today we announced important new metric-driven verification capabilities in our enterprise…

• less than a min read
Verification methodology , CDNLive , metric driven verification (MDV) , Functional Verification , Formal Analysis , Coverage-Driven Verification , CDV , Enterprise Manager , Plan and metrics management , coverage driven verification (CDV) , IES

Verification

"Day 0" of CDNLive San Jose 2008

Quick report from CDNLive Day 0 (I've labeled it that since this initial day was…

• 1 min read
CDNLive San Jose 2008 , MDV techtorial , System Verification

Verification

CDNLive SJ - system design and verification - don't miss it

If you are a system validation/verification engineer, an architect, a power engineer…

• 1 min read
Low Power , power engineer , system validation/verification engineer , embedded SW engineer , architect

System, PCB, & Package Design 

CDNLive! 2008 - San Jose: Day 1 ... from the Techtorials!

From the floor of CDNLive! 2008 - San Jose The first day, is always considered the…

• 1 min read
PCB Layout and routing , CDNLive , DEHDL , SPB16.2 , Design Entry HDL , ASA , Allegro System Architect (ASA) , Front-end PCB design , PCB design , CDNLive! , Allegro PCB Editor , ConceptHDL

Digital Design

Need for dynamic IR drop analysis at floor and power planning stages?

Here is a question for all the power grid designers out there: Do you see the need…

• 1 min read
dynamic rail analysis , Early Rail Analysis , Cadence Encounter Power System , Digital Implementation

Analog/Custom Design

CDNLive Techtorials: Everything you wanted to know about Virtuoso

Hey folks, if you are coming to the CDNLive conference, we have a lot of great "techtorials…

• less than a min read
RF design , CDNLive Techtorials , custom design technology
CDNS - Fix Layout Hompage