Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

Spectre FX Simulator Cuts Intrinsic Semi’s Memory Verification Time by 4X

Intrinsic Semiconductor Technologies, a company transforming the semiconductor industry…

Corporate
• 2 min read
newstory , featured , spectre fx , Instrinsic Semi , verification

Corporate News

Cadence Welcomes ChipStack

ChipStack, a leading startup providing agentic AI solutions for chip verification…

Corporate
• 1 min read
featured , agentic ai , Xcelium Logic Simulator , AI-Driven Verification

SoC and IP

The Power of Shifting Left: Cadence Accelerating Innovation with Arm

In semiconductor design, projects are remembered for their extremes—legendary successes…

Arif Khan
• 3 min read
ucie , xcellium , IP , featured , PHY

Corporate News

Accelerating System Design with Real-Time Simulation, Powered by AI Physics

Rising demand for AI infrastructure is driving faster innovation and smarter use…

Corporate
• 4 min read
CFD , featured , NVIDIA , accelerated compute , millennium
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

Designing Arm Server Chips the Cadence Way

I've written a lot about Arm over the years. My most recent post was simply Cadence…

• 1 min read
arm server , ampere , HPC , ARM

System, PCB, & Package Design 

X-FAB's Innovative Communication and Automotive Designs: Powered by Cadence EMX Planar…

Using the EMX solver, X-FAB design engineers can efficiently develop next-generation…

• 1 min read
EM Analysis , electromagnetics , in-design analysis , reference design , Electromagnetic analysis , PDK , foundry

Breakfast Bytes

Sunday Brunch Video for 31st July 2022

https://youtu.be/bym7Az0BZdY Made in my Mini Monday: Cadence Expands into Molecular…

• less than a min read
sunday brunch

Analog/Custom Design

Virtuosity: Custom IC Design Flow/Methodology - Circuit Physical Verification & Parasitic…

Read this blog for an overview to the Circuit physical verification and parasitic…

• 6 min read
design rule violations , Extraction , Layout versus schematic , Physical Verification System (PVS) , Virtuoso , Quantus Extraction Solution , PVS , Custom IC Design , parasitics

Breakfast Bytes

July Update: ST, GF, Arm, GPUs...and just CHIPS

Finally, a monthly update which appears in its advertised slot on the last Friday…

• 4 min read
GPU , mclaren , ST Microelectronics , GlobalFoundries , ARM , chips act

Analog/Custom Design

Start Your Engines: An Innovative and Efficient Approach to Debug Interface Elements…

This blog introduces you to an efficient way to debug interface elements or connect…

• 4 min read
connect modules , mixed signal design , featured , interface elements , AMS Designer , mixed-signal simulation , Virtuoso , SimVision-MS

Breakfast Bytes

AEK: Powerpoint Is Easy—Change is Hard

I wrote my first post about Automobil Elektronik Kongress 2022 earlier this week…

• 7 min read
Automotive , aek , ludwigsburg , automobil elektronik kongress

System, PCB, & Package Design 

SI/PI Simulation and Measurement Correlation Forum

Join this insightful on-demand webinar event "SI/PI Simulation and Measurement Correlation…

• 1 min read
electromagnetics , Power Integrity , in-design analysis , Signal Integrity

Breakfast Bytes

AEK: Semiconductors: The Base for the Software-Defined Car

At this year's Automobil Elektronik Kongress, there was a panel session titled Semiconductors…

• 10 min read
risc-v , NXP , mercedes-benz , ARM , automobil elektronik kongress

Computational Fluid Dynamics

Seakeeping Observations of SA Agulhas II Using Cadence Fidelity FINE/Marine

The shift left approach is slowly being realized and employed in the marine industry…

• 3 min read
CFD , Marine Engineering , C-Wizard , Pointwise , Fidelity CFD , engineering , simulation software , NUMECA , Meshing , Ships , seakeeping

Breakfast Bytes

Automobil Elektronik Kongress 2022

For me, the must-attend event to understand what is going on in the automobile industry…

• 5 min read
Automotive , automobile elektronik kongress , aek , ludwigsburg

Verification

Stay Ahead of Competition with Real-Time Cross-Team Collaborations

To stay ahead in competition in chip design real-time collaborations ensure traceability…

• 4 min read
collaboration , Palladium , verification management , Traceability , vManager

Life at Cadence

What’s Driving the Automotive Industry in 2022?

Cars are becoming computers on wheels with more processing power than the average…

• 6 min read
Automotive

Breakfast Bytes

Cadence Expands into Molecular Simulation with Acquisition of OpenEye Scientific

This morning, Cadence announced that it has entered into a definitive agreement to…

• 3 min read
openeye scientific , openeye , orion , molecular simulation

Analog/Custom Design

Spectre Tech Tips: Introducing Spectre X EMIR Voltus-XFi

This blog describes the new capabilities in Spectre 21.1 ISR2 through which it provides…

• 3 min read
Spectre X EMIR , Voltus-Fi-XL , Virtuoso Analog Design Environment , Spectre X distributed simulation , Spectre X Simulator

Breakfast Bytes

CadenceLIVE: Pegasus on AWS, Let Physical Verification Fly

At CadenceLIVE Silicon Valley, Ahmed Elzeftawi of AWS and Dibyendu Goswami of Cadence…

• 4 min read
Physical verification , pegasus , DRC , cloud , aws , cadence cloud

Academic Network

Cadence Academic Network at 59DAC

The Cadence Academic Network was excited to participate in many activities at the…

• 2 min read
DAC , Young Fellows , featured , Cadence Academic Network , CMC Microsystems

System, PCB, & Package Design 

In-Design Analysis in the Cloud with Cadence OnCloud

Last month at CadenceLive Silicon Valley, Cadence introduced a software-as-a-service…

• less than a min read
Power Integrity , in-design analysis , Signal Integrity , electromagnetic , thermal

Breakfast Bytes

ITF USA: Luc Van den hove on Deep Tech

The afternoon of the Monday of SEMICON West is always the Imec Technology Forum …

• 6 min read
itf usa 2022 , imec , itf
CDNS - Fix Layout Hompage