• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Cadence Blogs

Stay up to date with our latest corporate and technology blog posts

Explore the Cadence Forums to find and exchange in-depth technical information.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

    Popular Search: Corporate NewsArtificial IntelligencePCB DesignCFD

Featured

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela
Reela 2 Sep 2025 • 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 27 Aug 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
Corporate 21 Aug 2025 • 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
Vinod Khera 31 Jul 2025 • 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
cdns - all_blogs_categories

  • All 6045
  • Corporate News 192
  • Life at Cadence 199
  • Academic Network 166
  • Analog/Custom Design 760
  • Artificial Intelligence 23
  • Cloud 16
  • Computational Fluid Dynamics 359
  • Data Center 39
  • Digital Design 424
  • Learning and Support 55
  • RF Engineering 114
  • SoC and IP 407
  • System, PCB, & Package Design  982
  • Verification 1284
  • Cadence Japan 3

  • CFD(数値流体力学) 45
  • 中文技术专区 15
  • カスタムIC/ミックスシグナル 188
  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 44
  • Spotlight Taiwan 61
  • The India Circuit 89
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List

Latest blogs

SoC and IP

An inconvenient truth about using DDR3 SDRAM for embedded designs

DDR (double data rate) memory chips mounted on DIMMs have long been the mainstay…

archive 4 Jun 2010 • 3 min read

Verification

EDA360 And The "Paperback Computer"

Have you ever heard an assertion that's so intriguing and farsighted that it sticks…

jvh3 3 Jun 2010 • 7 min read
events , DAC , IP , paperback computer , innovation , metric driven verification (MDV) , Functional Verification , Advanced Node , EDA360 , Verification IP modeling , EDAC

SoC and IP

Storage Analyst Jim Handy says “NAND Cache is Back!”

Storage analyst and Grand Poobah Jim Handy has just released a free White Paper titled…

archive 3 Jun 2010 • 2 min read

SoC and IP

Kingston shows HyperX USB 3.0 SSD prototype at Computex

Earlier, this blog reported on OCZ’s Enyo USB 3.0 SSD and now at a private event…

archive 3 Jun 2010 • 1 min read

Verification

Making an EDA360 System Realization Investment Through Standards Support

Cadence is a sponsor of the Open SystemC Initiative (OSCI) standards organization…

Steve Brown 3 Jun 2010 • less than a min read
TLM , C-to-Silcon , OSCI , ESL

SoC and IP

Introduced at Computex: OCZ’s speedy RevoDrive brings PCIe SSD to consumer-class…

PC add-on vendor OCZ plays in several high-performance PC component markets including…

archive 2 Jun 2010 • 1 min read

Verification

C-to-Silicon Compiler 10.1 - Ease Of Use And RTL QoR

In the continuing effort to make high-level synthesis more viable to mainstream RTL…

Steve Brown 2 Jun 2010 • 1 min read
CTOS , TLM , C-to-Silicon , Synthesis , HLS

SoC and IP

Hitachi’s Z HDDs: Will 2.5mm less height make a difference? For SSDs?

Hitachi just shaved 2.5mm off of the top of its 2.5-inch laptop hard drives, producing…

archive 1 Jun 2010 • 1 min read

SoC and IP

More details on and system-design implications of the Hitachi-LG Data Storage HyDrive…

As discussed last week in this blog, Hitachi-LG Data Storage (HLDS)--an OEM vendor…

archive 1 Jun 2010 • 3 min read

System, PCB, & Package Design 

What's Good About AMS Simulator And Cursors? You’ll Need The SPB16.3 Release To See

With the SPB16.3 release of AMS Simulator , several new cursor enhancements are available…

Jerry GenPart 1 Jun 2010 • 1 min read
AMS , AMS simulator , SPB 16.3 , PSPICE , SPB , AMS simulation , Schematic

SoC and IP

ST Microelectronics’ SPEAr1300 embedded MCU features 600MHz dual-core ARM Cortex…

A few days ago, this blog discussed the “big resistor” model of SDRAM power consumption…

archive 28 May 2010 • 2 min read

Verification

TLM 2.0 As Part Of The EDA360 Vision

Ann Steffora Mutschler recently covered in her blog the progress the industry has…

Ran Avinun 28 May 2010 • 1 min read
TLM , virtual platform , TLM 2.0 , EDA360 , virtual prototype , SystemC , Synthesis , System Design and Verification

System, PCB, & Package Design 

Catch A Full-Wave Summer Kickoff Webinar: CST 3D Extraction Integrated With Cadence…

Is there anyone who does not carry a mobile communication device anymore? Sending…

TeamAllegro 28 May 2010 • 1 min read
SPB16.3 , SiP , Analog and RF SiP design , Digital SiP design , Allegro 16.3 , APD , webinar , SI analysis and modeling

SoC and IP

How does a hybrid SSD/optical drive make sense?

Some combinations like chocolate with peanut butter, ice cream with peanuts and chocolate…

archive 28 May 2010 • 1 min read

Verification

EDA360 Is More Than Design IP Plus Software Drivers

I checked my Linked-In messages the other day and saw a survey by Girish Patil with…

tomacadence 27 May 2010 • 2 min read
IP , Functional Verification , Virtual Chips , Phoenix , inSilicon , VIP , EDA360 , Sand

SoC and IP

Does Samsung really scare Japan? EETimes’ Junko Yoshida thinks so.

EETimes' Junko Yoshida just published an article titled “5 reasons why Samsung scares…

archive 27 May 2010 • 1 min read

SoC and IP

Marc Greenberg’s “big resistor” model of semiconductor DRAM power consumption

Too many DRAM choices. If you want low power DRAM, do you choose LPDDR1, LPDDR2,…

archive 25 May 2010 • 2 min read

SoC and IP

OCZ Enyo USB 3.0 SSD reviewed by PC Perspective video

Earlier, we covered the announcement of OCZ’s Enyo USB 3.0 external SSD. Now PC Perspective…

archive 25 May 2010 • less than a min read

SoC and IP

InfoWeek video series chronicles storage and SSD Evolution. Part 1 runs 8 minutes…

Can you spare nine minutes to get a really good grounding in SSD concepts? No? How…

archive 25 May 2010 • 1 min read
<>
CDNS - Fix Layout Hompage

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information