Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Breakfast Bytes

DesignCon: PCB and Packaging Take Center Stage

You wouldn't really know it from the name, but DesignCon is all about the design…

• 8 min read
si/pi , EMI , DesignCon , deep learning , Power Integrity , machine learning , Signal Integrity , dnn , CNN , neural network

Verification

New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions

The recent update of the AMBA® 5 ACE/AXI specification introduces a number of significant…

• 2 min read
amba5 , ACE5 , AXI5 , AMBA

Breakfast Bytes

DesignCon: SI, PI and EMI Have a Threesome

DesignCon 2018 opened with a keynote panel on the subject of SI, PI, and EMI Challenges…

• 8 min read
DesignCon , Power Integrity , Signal Integrity , electromagnetic interference

SoC and IP

You Won't Believe Your Ears When Listening to Your Laptop

I wouldn't believe it if I hadn't heard it myself on a laptop in the Cadence booth…

• 2 min read
CES , audio , HiFi , Tensilica

Breakfast Bytes

Open-Source IP in Government Electronics

At the RISC-V conference late last year, one of the keynotes was by Linton Salmon…

• 6 min read
risc-v , dod , darpa

Whiteboard Wednesdays

Whiteboard Wednesdays - LPDDR4X DRAM: Performance and Power Efficiency Improvements…

In this week's Whiteboard Wednesdays video, Kishore Kasamsetty will help you learn…

• less than a min read
Whiteboard Wednesdays , LPDDR4

Breakfast Bytes

All Models Are Wrong; Some Are Useful

"All models are wrong, some are useful.” This remark is attributed to the statistician…

• 9 min read
climate , model , digital , SPICE

Verification

JEDEC UFS 3.0 Now Available in Cadence VIP Portfolio – For Mobile and Automotive…

The JEDEC UFS (Universal Flash Storage) started in 2011 with the v1.0 first specification…

• 1 min read
Verification IP , UniPro , MIPI Alliance , JEDEC , automotive electronics , UFS , storage , MPHY

Breakfast Bytes

TSMC 30 Years Ago Today

At IEDM in December, Gary Dagastine is one of the people responsible for press relations…

• 6 min read
Taiwan , fabless , TSMC , chips and technologies , foundry

The India Circuit

The Promise Of Digital India

By 2019, it is estimated that there will be five billion mobile phone users in the…

• 4 min read
Narendra Modi , digital india , National Digital Literacy Mission , Aadhar , Ravi Shanker Prasad

Breakfast Bytes

City Slickers Marketing

Last week I talked about sales in Running a Salesforce . This week it is the turn…

• 4 min read
steve blank , city slickers marketing , marketing

Whiteboard Wednesdays

Whiteboard Wednesdays - Verification Challenges for SoCs Integrating CCIX Interface…

In this week's Whiteboard Wednesdays episode, Nick Heaton, Distinguished Engineer…

• less than a min read
Whiteboard Wednesdays , ccix

Computational Fluid Dynamics

Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil…

Numeca USA customer Morrelli & Melvin has been busy using FINE/Marine for various…

• 3 min read

Computational Fluid Dynamics

Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil…

Numeca USA customer Morrelli & Melvin has been busy using FINE /Marine for various…

• 4 min read

Breakfast Bytes

Coventor Annual Panel: The Next Five Years

For the last few years at IEDM, Coventor have run an evening panel session looking…

• 8 min read
asml , KLA-Tencor , Lam Research , nova , Coventor , GlobalFoundries , IEDM

Verification

Type MIN / MAX Values in Specman

When defining coverage bins for coverage items, the number and size of bins depend…

• 3 min read
Specman , Specman coverage engine , Specman e

Verification

App Note Spotlight: SystemVerilog Gets a Real Number Modeling Update (SVRNM)

Thanks to Xcelium, there’s a new feature on the block in SystemVerilog. It pertains…

• 1 min read
SystemVerilog , real number modeling , Functional Verification , App Note Spotlight

Verification

CCIX Coherency: Verification Challenges and Approaches

Cache coherency is not a new concept. Coherent architectures have existed for many…

• 2 min read
Verification IP , ccix , SoC , coherency , System Verification

Breakfast Bytes

Passwords: Just Add Salt

This is a second post about passwords, picking up where Passwords: How Even Your…

• 5 min read
security , password , two-factor authentication , Breakfast Bytes
CDNS - Fix Layout Hompage