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Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

Chiplets -- Reinventing Systems Design

A new paradigm shift is now happening in the electronics industry with systems design…

• 3 min read
SI , PI , chiplets , multi-die approach , chiplet-based systems , Power Integrity , IC package design , systems design , Signal Integrity , interposer extraction , Sigrity , heterogenous integration , advanced packaging technology

Analog/Custom Design

Virtuosity:"What's In a Name?"

It discusses the benefits of introducing tooltips in the Simulator Options and Analysis…

• 2 min read
ADE Explorer , options , Analysis Options , Choose Analysis , Analysis , ADE , Virtuoso Analog Design Environment , Virtuoso , Custom IC Design , Options form , ADE Assembler

Breakfast Bytes

An Illuminating Chat with Lumerical's CTO

During the recent photonics summit, I sat down with James Pond, the CTO of Lumerical…

• 4 min read
interconnect , Lumerical , photonics

Breakfast Bytes

Diwali, the Hindu Festival of Lights...and Photonics, the Silicon Festival of Li…

November 7 is the big day in Diwali, the Hindu Festival of Lights, as it symbolizes…

• 7 min read
curvycore , photonics , silicon-photonics

Breakfast Bytes

Do Cellphones Cause Brain Cancer?

One subject that regularly gets some traction in the news is whether cellphones cause…

• 8 min read
stastical significance , cellphones , significance , p-hacking , mobile , brain cancer , p-value

Breakfast Bytes

Neural Nets Hit the Roofline—Memory for AI

At the recent Linley Processor Conference, there were two interesting presentations…

• 4 min read
artificial intelligence , Memory , deep learning , DRAM , roofline , AI

Breakfast Bytes

Sunday Brunch Video for 25th November 2018

https://youtu.be/yroiWVJA8vs Made on top of Haleakala, Maui (camera Carey Guo) Monday…

• less than a min read

PCB、IC封装：设计与仿真分析

针对电气工程师的热管理基础——第二篇

作者：Lawrence Der 在热管理入门基础知识——第一篇 里，我们讨论了电域和热域之间的二元性。在这篇文章中，我们来聊聊三种不同的热传输机制，以及它们是如何与热阻相关联的…

• less than a min read
热 , Chinese blog , 热分析 , 温度 , 中文 , PowerDC , 传热 , 热基础

Breakfast Bytes

The Fermi Paradox

It's the day before Thanksgiving. Breakfast Bytes will be dark Thursday and Friday…

• 6 min read
offtopic , fermi paradox , drake equation

Breakfast Bytes

Google TPU Software

In yesterday's post I gave the details of the TPU hardware from Cliff Young's keynote…

• 5 min read
codesign , tpu , google , Linley

Breakfast Bytes

Inside Google's TPU

At the Linley Fall Processor Conference recently, the keynote on the second day was…

• 6 min read
tpu , google , TensorFlow , machine learning

Breakfast Bytes

Sunday Brunch Video for 18th November 2018

https://youtu.be/G12sQpq0JSI Made on Maui (camera Carey Guo) Monday: Portable Stimulus…

• less than a min read
PCB , security , artificial intelligence , processor , Perspec , linley group , semi , Sigrity , pss , AI , Allegro

PCB、IC封装：设计与仿真分析

如何一劳永逸轻松对接三维建模专家

回想一下那个坐在角落里被一群博士们簇拥着的同事；人人都想找这位3D专家给自己的设计做3D结构分析。他/她好像无所不能，会使用一般人难以掌握的软件工具。 但是问题是…

• less than a min read
系统串行链路 , SI , Chinese blog , 3D EM , 3D EM HSSO , 3D EM高速结构优化器 , 中文 , 3D , HSSO , Sigrity , 高速结构优化 , 信号完整性 , Allegro

Breakfast Bytes

The Linley Halloween Processor Conference

Halloween saw the latest Linley Fall Processor Conference. It is only a few years…

• 10 min read
linley processor conference , wave computing , Linley , Tensilica , ARM

定制IC芯片设计

Virtuoso: 新序曲-新视角下的拥塞分析

总结: 敬请关注这种独特的布线功能集以及ICADVM 18.1中即将推出的Design Planner工具，并以全新的视角来体验新的拥塞分析辅助工具。

• less than a min read
Congestion Analysis , Chinese blog , Virtuoso Next , Virtuoso Overture , ICADVM18.1 , Virtuoso New Design Platform , Virtuoso Space-based Router , Routing , Virtuoso Advanced Release , Congestion Assistant , Congestion Analysis Assistant , New in EDA , Custom IC Design , Virtuoso New Design , Design Planner , Custom IC

Analog/Custom Design

Virtuoso: The Next Overture – Concurrent Layout – a New Methodology for Team Des…

Any task when divided among multiple people gets done quickly... right? What if we…

• 4 min read
Chip finishing , Virtuoso Next , Virtuoso Overture , ICADVM18.1 , Virtuoso New Design Platform , Virtuoso Advanced Release , Layout , Custom IC Design , Virtuoso Layout Suite , VLS XL , Virtuoso Layout Suite XL

Breakfast Bytes

Mechanical, Thermal, EMI, SI, PI: PCB Design Needs Them All

Back in the days when Roger Moore was James Bond, there were various criticisms of…

• 3 min read
PCB , Signal Integrity , PCB design , Sigrity , thermal , Allegro

Breakfast Bytes

How to Find Primes

Primes are really important in encryption. In fact, the foundation of internet security…

• 9 min read
security , prime number , encryption , factorization

Whiteboard Wednesdays

Tensilica HiFi 5 DSP Enabling Machines for Voice UI

In this week’s Whiteboard Wednesday, Sachin Ghanekar, Design Engineering Group director…

• less than a min read
hifi 5 , Whiteboard Wednesdays , Tensilica , HiFi DSP
CDNS - Fix Layout Hompage