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The Three-Layer Cake: The Foundation Behind Intelligent Engineering

Artificial intelligence is rapidly becoming the engine behind the next era of technology…

Corporate
• 7 min read
featured , infrastructure ai , agentic ai , Principled Simulation , physical ai

Data Center

Cadence Accelerates Digital Twin–Driven Data Center AI Modernization with HPE

Solution will maximize data center and AI factory profitability while delivering…

Corporate
• 3 min read
news story , featured , infrastructure ai , data center , hpe

Corporate News

Honda + Cadence = Physical AI (part 1): What Does “Physical AI” Really Mean?

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The more widely the term …

Corporate
• 7 min read
featured , physical ai , HGR , AI , Honda

Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform
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Breakfast Bytes

DVCon Keynote: the Past and Future of Verification

Last week was DVCon, the design and verification conference. Despite the D standing…

• 5 min read
SystemVerilog , Wally Rhines , formal , Verilog , Emulation , DVcon , Rhines , simulation , verification

Breakfast Bytes

EDA in the Cloud: Stormy Weather

SoC design groups don't do clouds. True, they take advantage of some of the underlying…

• 4 min read
security , EDA , cloud , Breakfast Bytes , cloud computing

Whiteboard Wednesdays

Whiteboard Wednesdays - Reusable Data-Driven Verification Using TLM 2.0

In this week's Whiteboard Wednesdays, Zeev Kirshenbaum describes a method for creating…

• less than a min read
SystemVerilog , Verification IP , Whiteboard Wednesdays , TLM 2.0 , data driven verification

System, PCB, & Package Design 

What's Good About the Latest PSpice? The 16.6-2015 Release Has Several New Enhancements…

The 16.6-2015 PSpice release has several new features and capabilities: VBIC Support…

• 2 min read
Allegro 16.6 , AMS simulator , 16.6 , PSPICE , PCB design , AMS simulation , Grzenia

Breakfast Bytes

Turing Award; Google's First Crash

Turing Award 2016 The highest award in computer science, sometimes referred to…

• 3 min read
rsa , public key cryptography , turing award , google car , cryptography , turing , alan turing , diffie helman

SoC and IP

The most powerful feature of USB Type-C – Power Delivery

One thing that all mobile electronics devices have in common is that they all need…

• 1 min read
USB 3.0 , Jacek Duda , Consumer Electronics Show , CES , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1

Breakfast Bytes

Automatic Testbench Assembly

Every so often there is a change in the level where design gets done and, thus, a…

• 4 min read
automatic testbench assembly , uvm , IP-XACT , VIP , Socrates , ARM , verification

Whiteboard Wednesdays

Whiteboard Wednesdays—PCIe Gen4: Is It Coming Anytime Soon?

In this week's Whiteboard Wednesdays video, Moshik Rubin discusses the history of…

• less than a min read
Whiteboard Wednesdays , IP , PCIe Gen4 , interfaces , PCIe , PCI Express

Breakfast Bytes

embedded world: Baby You Can Drive My Car

embedded world is a large conference held every February in Nürnberg, Germany (about…

• 5 min read
ECU , Automotive Ethernet , autonomous cars , Tensilica , Embedded World

SoC and IP

See Demonstration Video of PCIe 4.0 PHY IP in TSMC 16FF+

Did you miss DesignCon this year? If so, you also missed the demonstration of our…

• less than a min read
DesignCon , PCIe Gen4 , pcie4 , SerDes

Breakfast Bytes

Barcelona MWC: Cadence, Vision, Audio, USB Type-C

Cadence has been at Mobile World Congress all week. Actually they are still there…

• 4 min read
lumia , USB Type-C , mwc16 , Mobile World Congress , HiFi , convolutional neural network , MWC , Tensilica , CNN

Academic Network

Students from University of Calgary Visit Cadence Headquarters

The Cadence Academic Network is also a career network. We love to help students from…

• 2 min read
university , Cadence Academic Network , Calgary , engineering , university program

Breakfast Bytes

Barcelona MWC: ARM, Virtual Reality, Formula 1

Sometimes a little slip of the tongue gives away a deeper truth. One of those happened…

• 6 min read
Simon Segars , barcelona , gsma , Mobile World Congress , vr , lewis hamilton , MWC , formula one , Qualcomm , formula 1 , ARM , Breakfast Bytes , sk telecom

Academic Network

Do You Want to Be Up-to-date About the Cadence Academic Network?

If yes, then join our community of more than 1000 colleges and subscribe to Cadence…

• 1 min read
university , Cadence Academic Network , academia

Breakfast Bytes

Barcelona MWC: Zuckerberg Interview

The last event of the day at Mobile World Congress was an interview with Mark Zuckerberg…

• 5 min read
Oculus , mwc16 , barcelona , Facebook , MWC , virtual reality , drones , zuckerberg

Breakfast Bytes

Barcelona MWC: 5G and Disruption

I am in Barcelona at Mobile World Congress. They won't give me a press pass since…

• 6 min read
5G , mwc16 , barcelona , at&t , Mobile World Congress , Ericsson , MWC , ARM

Whiteboard Wednesdays

Whiteboard Wednesdays—Power Delivery Trends from CES 2016

In this week's Whiteboard Wednesdays video, Jacek Duda recaps his experience at the…

• less than a min read
Whiteboard Wednesdays , USB Type-C , Consumer Electronics Show , CES , CES 2016 , USB , Type-C , power

System, PCB, & Package Design 

What's Good About the Capture-PSpice Flow? The 16.6-2015 Release Has Several New…

In the Capture-PSpice 16.6-2015 release, the following enhancements have been added…

• 3 min read
AMS , AMS simulator , OrCAD Capture , Capture CIS , PSPICE , SPB , OrCAD , AMS simulation , Grzenia

Breakfast Bytes

Learning is the New Programming: Neural Nets

Whenever I hear of "deep learning," it makes me think of Deep Thought, the computer…

• 4 min read
deep learning , embedded vision , learning , Tensilica , vision , neural networks , CNN , neural nets , embedded neural nets
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