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Data Center

Digital Twins Enable the Next Era of AI Infrastructure

Artificial intelligence (AI) is reshaping the data center. As AI workloads scale…

Corporate
• 5 min read
featured , Data Center Design , Data Center Operations , data center digital twin , AI factory

Corporate News

The Engineering Workforce Multiplier: How Agentic AI Is Shaping Silicon Design

A virtual engineering organization coordinates reasoning and intent across design…

Corporate
• 3 min read
ChipStack , featured , agentic ai , GTC , NVIDIA

Corporate News

Cadence at DesignCon 2026: AI-Driven Design from Booth to Best Paper

When the industry's toughest engineering questions meet their sharpest minds, you…

Veena Parthan
• 7 min read
featured , AI-Driven Design , DesignCon 2026

Corporate News

Powering the AI Supercycle: Design for AI and AI for Design

At the IEEE International Solid-State Circuits Conference (ISSCC) 2026 in San Francisco…

Reela Samuel
• 4 min read
Multi-Agent Systems , featured , AI Supercycle , agentic ai , automation
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Blog - Post List
Latest blogs

Computational Fluid Dynamics

From Sketch to Speedway: McLaren Formula 1 Team’s Aerodynamics Tale

Formula 1 is renowned for its avant-garde technology and engineering excellence.…

• 3 min read
CFD , featured , McLaren Racing , formula 1 , Aerodynamics

Life at Cadence

Exploring Strengths with Personality and Preference Inventory (PAPI) Assessment

Written by Pooja Pangoria, Software Engineering Group Director, Bangalore “You alone…

• 5 min read
Corporate Culture , personal development , life at cadence

カスタムIC／ミックスシグナル

Virtuoso Studio: Virtuoso ADE Assemblerでシミュレーション履歴に名前を付ける方法は？

当社の新しい AI 搭載カスタム設計ソリューション Virtuoso Studio は、我々の30年にわたる業界の知識とリーダーシップを活用し、革新的な機能、比類のない生産性を実現する再構築されたインフラストラクチャ…

• less than a min read
カスタムIC , Virtuoso Analog Design Environment , japanese blog , Custom IC , Virtuoso ADE Assembler , ADE Assembler , IC23.1 , Virtuoso IC23.1

Corporate News

Socionext Is Tackling SoC Design Challenges

Socionext is an SoC company that has pioneered its business model to help companies…

• 1 min read
Tempus , designed with cadence , Socionext , digital , certus , Quantus

System, PCB, & Package Design 

Podcast: PCB 3.0: It’s All About the Data

Data management and PCB design discussions have shifted from the basics of data management…

• less than a min read
data management , Allegro Pulse , PCB design , Workforce Development , Allegro

Corporate News

Cyber Security at the Olympics: Protecting the World's Greatest Games

The Olympic Games are more than just an international sporting event. They symbolize…

• 7 min read
security , cloud , cyber attacks , cyber security , Olympics , 2024 Paris Olympics , technology

System, PCB, & Package Design 

System Analysis Knowledge Bytes - Importance of VRM Modeling in PDN Simulation

This post talks about the role of VRMs in Power Integrity (PI) analysis It discusses…

• 5 min read
Power Integrity Analysis , PDN , Cadence Online Support , Sigrity OptimizePI , signal integrity analysis , PDN Analysis , RAKs , Voltage Regulator Modules , VRMs

Corporate News

VIP Portfolio Expands for Data-Intensive Hyperscale Data Centers, HPC, and AI/ML

New additions, including first-to-market VIP for PCIe 7.0, Ethernet 1600G, GDDR7…

• 1 min read
ucie , Verification IP , featured , data center , VIP , PCIe 7.0 , PCIe , HPC , hyperscale , high-performance computing , AI/ML , GDDR7

Corporate News

Dream Chip and Cadence Demo Automotive SoC Featuring Tensilica AI IP at Embedded…

Cadence Verification and RTL-to-GDS Digital Full-Flow Tuned for Automotive Safety…

• 2 min read
Automotive , Verification IP , Tensilica , verification

System, PCB, & Package Design 

System Analysis Knowledge Bytes - Early System-Level Thermal Analysis

This post introduces you to the CAD capabilities of the Celsius Thermal Solver. It…

• 3 min read
Celsius Thermal Solver , Cadence Online Support , RAK , Celsius 3D , Thermal Analysis

Corporate News

The History of Electronics in Sports

In today's fast-paced world, technology touches nearly every part of our lives, including…

• 5 min read
featured , PSPICE , design excellence , Tensilica , 49ers , McLaren Racing , olympic , Olympics , AI , technology

Learning and Support

CadenceLIVE Silicon Valley 2024

CadenceLIVE Silicon Valley 2024 was a notable event recently held at the Santa Clara…

• 2 min read
digital design , Semiconductor , bridgingthelearninggap , cadencelive , online training

SoC and IP

Cadence Showcases World's First 128GT/s PCIe 7.0 IP Over Optics

PCI-SIG DevCon 2024 was a great success for Cadence. We posted the blog, Cadence…

• 2 min read
Design IP , IP , featured , PHY , 128 GT/s , PCIe 7.0 , PCIe , Optics , SerDes , SerDes IP

カスタムIC／ミックスシグナル

Virtuoso Studio: 動作点パラメータ値を簡単にレビューする

当社の新しい AI 搭載カスタム設計ソリューション Virtuoso Studio は、我々の30年にわたる業界の知識とリーダーシップを活用し、革新的な機能、比類のない生産性を実現する再構築されたインフラストラクチャ…

• less than a min read
Operating point summary window , Virtuoso Studio , Operating Point Information , 動作点情報 , Virtuoso Analog Design Environment , カスタムIC設計 , japanese blog , Custom IC Design , Virtuoso ADE Explorer , Virtuoso ADE Assembler , ADE Assembler , IC23.1

Data Center

Reimagine Enterprise Data Center Design and Operations

Ever feel like the only constant in the data center industry is that things are always…

• 3 min read
featured , data center , digital twin

Cloud

Silvus Achieves Faster Tapeout of Advanced RF-MS Chip with Cadence Managed Cloud

Silvus Technologies announced the successful tapeout and bring-up of an advanced…

• 1 min read
featured , Managed Cloud , EDA , cloud

SoC and IP

How Cadence Is Expanding Innovation for 3D-IC Design

The market is trending towards integrating and stacking multiple chiplets into a…

• 5 min read

Corporate News

Cyborg Games at Olympics: Fusion of Technology and Physical Prowess

Envision a competition where athletes rely on their physical prowess and harness…

• 5 min read
Exoskeletons , Cyborg Games , Prosthetics , Olympics , 2024 Paris Olympics , technology

SoC and IP

Cadence Demonstrates Complete PCIe 7.0 Solution at PCI-SIG DevCon ‘24

PCI-SIG DevCon 2024 – 32 nd Anniversary For more than a decade, Cadence has been…

• 6 min read
Design IP , IP , PHY , PCIe 7.0 , PCIe , semiconductor IP , SerDes , PCI Express , PCI-SIG
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