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Featured

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
Corporate 25 Jun 2026 • 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
Corporate 24 Jun 2026 • 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
Corporate 23 Jun 2026 • 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
Corporate 22 Jun 2026 • 8 min read
featured , physical ai , HGR , AI , Honda
cdns - all_blogs_categories

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  • SoC and IP 435
  • System, PCB, & Package Design  1016
  • Verification 1326
  • Cadence Japan 18
  • Physical Systems Simulation 23

  • CFD(数値流体力学) 45
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  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 45
  • Spotlight Taiwan 64
  • The India Circuit 93
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

RF /マイクロ波設計

μWaveRiders:RF /マイクロ波の学生様向けCadence AWRの大学プログラム

Team RF "μWaveRiders" ブログシリーズがCadence AWR RF製品のためのショーケースとしてデビューします。月ごとの話題はCadence…

RF Design Japan 17 Mar 2021 • less than a min read
microwave , RF , AWR Analyst , Cadence Academic Network , AWR Design Environment , AWR AXIEM , RF design , AWR VSS , japanese blog , university program

RF Engineering

μWaveRiders: Cadence AWR University Program for RF/Microwave Students

For students in the RF/Microwave area of study, the Cadence AWR Design Environment…

TeamAWR 17 Mar 2021 • 4 min read
microwave , RF , AWR Analyst , Cadence Academic Network , AWR Design Environment , AWR AXIEM , RF design , AWR VSS , university program

Computational Fluid Dynamics

ETNZ Wins the America's Cup Once Again Using FINE/Marine

Once again Emirates Team New Zealand has entered the history books and won the America…

Paul McLellan 17 Mar 2021 • less than a min read
CFD , fine/marine , Computational Fluid Dynamics , NUMECA

Breakfast Bytes

DeepChip Best of 2020: vManager

We just finished 2020 (and let's hope 2021 is a better year). Every year, John Cooley…

Paul McLellan 17 Mar 2021 • 4 min read
deepchip , john cooley , vManager , verification

カスタムIC/ミックスシグナル

Virtuoso Meets Maxwell: Virtuoso RF ソリューション — フローの革命が次のレベルへ突入

'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

Custom IC Japan 16 Mar 2021 • less than a min read
5G , IMS , integrand , SiP , pegusas , Virtuoso Overture , VRF , Celcius , awr , Virtuoso Meets Maxwell , Virtuoso System Design Environment , Virtuoso RF , Allegro Package Designer Plus , EMX , AWR AXIEM , RF design , SiP Layout Option , ICADVM20.1 , Sigrity , japanese blog , Quantus , Clarity 3D Solver , Custom IC Design , Allegro , VMM

Analog/Custom Design

Virtuoso Meets Maxwell: How to Simulate an RF Block with Passive and Active Devices…

Do you work with RF designs that contain both active and passive devices? Have you…

jgrad 16 Mar 2021 • 3 min read
AXIEM , VLS EXL , EM Solver , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Electromagnetic analysis , black boxing , Virtuoso , EMX , ICADVM20.1 , Clarity 3D Solver , Virtuoso Layout Suite EXL

Breakfast Bytes

Announcing Sigrity X

There are many different computational software algorithms used in EDA. One challenge…

Paul McLellan 16 Mar 2021 • 6 min read
x-technology , computational software , Signal Integrity , Sigrity

RF /マイクロ波設計

AWR製品の技術サポートがCadence Online Supportに移行されました!

2021年3月8日以降、AWR製品の技術サポートは標準のケイデンスサポートプロセスに移行されました。 このページは、この移行を通じてAWR製品のお客様を支援するトピックのコレクションです…

RF Design Japan 16 Mar 2021 • less than a min read
AWR Design Environment , awr , japanese blog

定制IC芯片设计

Virtuoso Meets Maxwell:跨结构电磁提取功能- 简化IC、封装和电路板耦合的任务

当您在设计RFICs或RF模块时,如果只分析IC或模块上的电磁行为,那么可能会造成结果缺失。即使IC的电磁行为已达到其规格要求,也很容易将其耦合至模块周边的走线上…

jgrad 15 Mar 2021 • 1 min read
Chinese blog , Virtuoso ICADVM20.1 , Virtuoso Layout EXL , Virtuoso Meets Maxwell , Electromagnetic analysis , Virtuoso , Custom IC Design , Virtuoso Layout Suite

Breakfast Bytes

The History of PCIe: Getting to Version 6

PCIe, or Peripheral Component Interconnect Express which nobody ever says, was an…

Paul McLellan 15 Mar 2021 • 6 min read
pcie gen 5 , PCIe

Breakfast Bytes

Sunday Brunch Video for 14th March 2021

https://youtu.be/bzgotynPvs8 Made at Fry's Electronics in San Jose (camera Ziyue…

Paul McLellan 14 Mar 2021 • less than a min read
sunday brunch

Academic Network

Expanding Our Network — AWR Academic Partners

We want to continue highlighting the amazing AWR academic connections! We’ll be covering…

Kira Jones 12 Mar 2021 • 6 min read
Lead Institutions , Cadence Academic Network , awr , University of Bristol , university program

RF Engineering

TECHTALK Webinar: Fast MMIC Design with Distributed EM Analysis

Join us March 24th, 2021 at 11:00am - 12:00pm PDT for this webinar with Nick Chopra…

TeamAWR 12 Mar 2021 • 2 min read
TechTalk , AWR Design Environment , RFIC , Distributed EM analysis , EM simulation , webinar , Cadence RF , MMIC

Analog/Custom Design

Start Your Engines: Win Le Mans with the SimVision Mixed-Signal Debug Option

In this post, I will explain how the new Cadence SimVision Mixed-Signal Debug option…

Andre Baguenie 12 Mar 2021 • 5 min read
AMS Designer , Start Your Engines , simvision , analog/mixed-signal , Virtuoso , AMSD Flex Mode , mixed-signal design , debugging , mixed-signal verification

The India Circuit

Saurav Bhardwaj: A Story of Resilience and Willpower

Subsequent to my previous blog about the Cadence Scholarship Program, I bring to…

Asim Khan 12 Mar 2021 • 3 min read
CadenceCares , CadenceScholarshipProgram , cadence

Breakfast Bytes

The Carrington Event: When Will We Have Another?

Back in the pre-Cadence days when I had the EDAgraffiti blog, I wrote about the Carrington…

Paul McLellan 12 Mar 2021 • 7 min read
solar flare , carrington event , coronal mass ejection , cme

Verification

Transport Layer – The Backbone of a USB4 Router

It won’t be incorrect to say that the transport layer of a USB4 router is the backbone…

Neelabh 11 Mar 2021 • 1 min read
Verification IP , USB4 VIP , usb4 , usb4 router

Breakfast Bytes

Best of CadenceLIVE 2020: The Keynotes

The first CadenceLIVE 2021 will be CadenceLIVE Americas on June 8-9. It will be a…

Paul McLellan 11 Mar 2021 • 1 min read
cadencelive 2020 , cadencelive

Analog/Custom Design

Virtuoso Video Diary: Knowledge Booster Training Bytes - Part 6

In this blog. we would like to let you know the information on how to achieve complete…

Parula 10 Mar 2021 • 4 min read
blended , Pegasus Verification System , ERC , pegasus , DRC , LVS , training , training bytes , Virtuoso , Cadence certified , Virtuoso Video Diary , Cadence Education Services , PVS , Custom IC Design , online training , Custom IC
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