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The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda
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Blog - Post List
Latest blogs

Whiteboard Wednesdays

Whiteboard Wednesdays - CloudBurst - Fast, Painless, Proven Solution for Hybrid Cloud…

In this week's Whiteboard Wednesdays video, Craig Johnson explains the reasons behind…

• less than a min read
Whiteboard Wednesdays , Cloud-based Design , cloudburst

Breakfast Bytes

Genus and Innovus: Together at Last

Yesterday I wrote about a presentation at CDNLive Silicon Valley Qualcomm: Bring…

• 5 min read
Genus , CDNLive , Synthesis , CDNLive Silicon Valley

定制IC芯片设计

Virtuosity: 运行计划助手的新功能-第一部分

事实证明，Virtuoso ADE Assembler 中的运行计划助手是最流行的功能之一。它提供了在单个会话中创建多个设置变体的功能，每个运行都有自己的设置详细信息…

• less than a min read
Chinese blog , Analog Design Environment , Virtuoso , Run Plan , Custom IC Design , Custom IC , IC6.1.8 , ADE Assembler

System, PCB, & Package Design 

BoardSurfers: Place Replicate to Increase IP Reuse and Decrease Design Time

Once you have successfully designed and optimized an area of your substrate today…

• 4 min read
Place Replicate Module , Allegro PCB Editor

Breakfast Bytes

Qualcomm: Bring Me My Snapdragons

I'm writing this before the Game of Thrones season opener last night. But since last…

• 5 min read
Genus , CDNLive , Qualcomm , Innovus , Synthesis , CDNLive Silicon Valley

Breakfast Bytes

Sunday Brunch Video for 14th April 2019

https://youtu.be/ml397HeOHcc Made at Steve Brown's Tesla in Cadence parking lot…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

如何利用Virtuoso平台高效精确地设计一款射频前端模块电路（一）

作为一名射频前端设计的工程师，大家肯定都有过这样的疑惑：我究竟是做IC设计的，还是做板级电路设计的？如果是前者，为什么我们做仿真不跑corner，不跑蒙特卡罗，甚至连个精确的晶体管模型都没有…

• less than a min read
射频 , Chinese blog , 仿真分析 , 射频前端模块 , 协同仿真 , Virtuoso , 中文

Breakfast Bytes

Brad Brim and the History of Signal Integrity

I sat down with Brad Brim recently. He was retiring from Cadence literally the following…

• 6 min read
system analysis , Signal Integrity , Sigrity , clarity

System, PCB, & Package Design 

Power Plane Loop Inductance Guidance for PDN Designers

Gaining an understanding of power plane loop inductance is important for efficient…

• 1 min read
SI , DesignCon , PDN , Power plane loop inductance , DesignCon 2019 , Signal Integrity , Sigrity , PowerSI

Analog/Custom Design

Virtuoso Video Diary: Creating and Previewing Stimuli

If you've ever tried to add stimuli to your design using the Stimuli form, you'll…

• 3 min read
ADE Explorer , stimuli form , stimuli , Virtuoso Analog Design Environment , ViVA , Virtuosity , ADE Blog Series , Custom IC Design , ADE Assembler , Stimuli Assignment form

Breakfast Bytes

Superhuman Photonic Design

I recently came across an article titled Generative Design Could Radically Transform…

• 3 min read
curvycore , Lumerical , silicon photonics , Virtuoso , photonics

Breakfast Bytes

TI's Experience Taping out with Pegasus

At the recent CDNLive Silicon Valley, Kyle Peavy of Texas Instruments (TI) presented…

• 5 min read
CDNLive , pegasus , DRC , design rule check , CDNLive Silicon Valley

Analog/Custom Design

Virtuoso Video Diary: Tune In to the MPT Video Channel

Tune In to the MPT Video Channel to check out a wide range of features easily accessible…

• 1 min read
ICADVM18.1 , video , Layout , Virtuoso , Virtuoso Video Diary , advanced nodes , multi-patterning technology , Custom IC

Whiteboard Wednesdays

Whiteboard Wednesdays - 3X Faster Design Closure with Quantus Integrated Virtual…

In this week's Whiteboard Wednesdays video, Senior Product Engineering Manager Varun…

• less than a min read
Whiteboard Wednesdays , Quantus , IVMF

Breakfast Bytes

Barefoot in a CloudBurst: Tempus on 2000+ CPUs

Barefoot Networks gave a couple of presentations at the recent CDNLive Silicon Valley…

• 5 min read
CDNLive , barefoot networks , cloudburst , cadence cloud , CDNLive Silicon Valley

Breakfast Bytes

Driving Dangerously

I've written a few times before about the fragility of neural networks, for example…

• 5 min read
Automotive , deep learning , tesla , ADAS , neural networks

Breakfast Bytes

Sunday Brunch Video for 7th April 2019

https://youtu.be/DUu3M30lilE Made at CDNLive Silicon Valley (camera Sean) Monday…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

Chiplets——重新定义系统设计

当下，电子行业经历着系统设计的新范式转变：传统的单片SoC电子系统设计思路正逐渐转变为使用chiplets（即“小芯片”）和高级封装技术的多芯片设计方法。这种逆转思维为系统设计开启了一个新的时代…

• less than a min read
SI , PI , Chinese blog , 电源完整性 , chiplets , 异质集成 , 中介层提取 , 系统设计 , IC封装设计 , 多芯片设计 , 高级封装 , 基于chiplets的系统 , 中文 , Sigrity , 信号完整性

The India Circuit

Simple Things You Can Do To Get Ahead In The Workplace

Recently we were lucky to have two of the women vice presidents at Cadence – Karna…

• 3 min read
International Women's Day , Women at Cadence , Cadence India , women leaders
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