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Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
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Blog - Post List

Latest blogs

Breakfast Bytes

How Virtualization Is Changing Networking

On the second day of the Linley Processor conference, the keynote was by Bruce Davie…

• 5 min read
virtualization , linley processor conference , VMware , Linley , network virtualization , Breakfast Bytes , networking

Breakfast Bytes

What’s for Breakfast? Preview October 24th to 28th (video)

https://youtu.be/PHVpQ_-tmY8 Monday: The IoT attacks, with the biggest distributed…

• less than a min read
security , OIP , vast , Automotive , virtualization , functional safety , IoT , distributed denial of service , VMware , botnet , TSMC , vm/370 , Internet of Things , DVcon , DVCon Europe , ISO 26262 , ADAS , sophia antipolis , ddos , fusa , reliability , Virtutech

Breakfast Bytes

Andrzej Strojvas, the 2016 Kaufman Award Recipient

This year's Kaufman Award recipient is Andrzej Strojvas. He is the Keithley professor…

• 5 min read
Andrzej Strojvas , Kaufman Award , cmu , pdf solutions , EDAC , carnegie meilon university , kaufman , Breakfast Bytes , esd alliance

Academic Network

Try These Innovative Online Educational Tools

Web applications for electronics design provide an environment where users can apply…

• 6 min read
EDA Playground , Cadence Academic Network , Spicy VOLTsim , Incisive simulator , ElvisLab

Whiteboard Wednesdays

Whiteboard Wednesdays - Error Injection: Predefined and Callbacks

In this week's Whiteboard Wednesdays video, James David talks about the benefits…

• less than a min read
Verification IP , Whiteboard Wednesdays , IP , VIP , SoC

SoC and IP

3 Reasons That the Semiconductor Clouds Are Gathering

With cloud technology going vertical, everything is changing. The world is connected…

• 3 min read
CDNLive , PCIe Gen4 , virtual reality , augmented reality

Breakfast Bytes

Silicon on Nothing: the Origins of FD-SOI

Yesterday, I wrote about the new 12FDX process, which is a derivative of the original…

• 5 min read
stm , 22fdx , 12fdx , ST , Samsung , gf , silicon on nothing , FinFET , GlobalFoundries , thomas skotnicki , Breakfast Bytes , FD-SOI

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? So How Does Your Design “Stack-Up”? (Reason 5 of…

We are not talking about how your design compares to the next guys’, we’re talking…

• 4 min read
Routing , Rigid-Flex , MCAD-ECAD , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Breakfast Bytes

GLOBALFOUNDRIES' Dual Roadmap

The Story So Far GLOBALFOUNDRIES had a 28nm Hi-K PolySi process. I think that…

• 5 min read
glofo , 22fdx , 12fdx , 14nm , emram , GlobalFoundries , 7nm , Breakfast Bytes

Analog/Custom Design

Virtuoso Video Diary: Creating Net Groups and Constraining Them with Spacing Using…

In this new age of complex designs and scaling of technology nodes, there are more…

• 4 min read
Advanced Node , Virtuoso Schematic XL , Virtuoso Video Diary , Custom IC Design , VLS XL , Virtuoso Layout Suite XL

Breakfast Bytes

How to Verify MIPI Protocols

At the recent MIPI DevCon, Cadence's Ofir Michaeli gave two presentations on verification…

• 5 min read
Verification IP , layered protocol , VIP , MIPI , mipi devcon , Breakfast Bytes

Breakfast Bytes

What’s for Breakfast? Preview October 17th to 21st (video)

https://youtu.be/P3jRt2HEe8U Monday: GLOBALFOUNDRIES announced new nodes on their…

• less than a min read
glofo , Memory , linley processor conference , MemCon , network function virtualization , Cisco , Carnegie Mellon University , Andrzej Strojvas , VMware , Kaufman Award , 12fdx , cmu , network virtualization , pdf solutions , ST Microelectronics , GlobalFoundries , thomas skotnicki , kaufman

Breakfast Bytes

MemCon 2016: Storage Class Memory

MemCon, the annual all-things-memory conference originally started by Denali and…

• 7 min read
vertical flash , SCM , Memory , MemCon , LPDDR , flash , storage class memory , IBM , ddrx , DRAM , DDR , Breakfast Bytes

System, PCB, & Package Design 

What’s Good About Allegro PCB Editor Backdrill Capability? New Capabilities in 17…

The 17.2 Allegro PCB Editor has improved backdrill capabilities. Backdrill data…

• 3 min read
PCB , PCB Layout and routing , Allegro 17.2 , Allegro GUI , layer stacks , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor , Why Move Up to 17.2 , Allegro

Breakfast Bytes

Cache Coherency Is the New Normal

You hear a lot about cache coherency these days. In fact, at the recent Linley processor…

• 6 min read
linley processor conference , linley group , Arteris , Linley , cache coherent , cache coherency , netspeed , cache , ARM , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Driving Forces and Design Concerns Behind PCI Express Ge…

In this week's Whiteboard Wednesdays video, the second in a two-part series, Lana…

• less than a min read
Whiteboard Wednesdays , PCIe , PCI Express Gen4 , PCI Express

System, PCB, & Package Design 

Welcome to the Signal Integrity and Power Integrity Community

This is your resource for all things regarding Signal Integrity and Power Integrity…

• less than a min read
PCB , SI , PI , IC Package , Power Integrity , Signal Integrity

Academic Network

Ultra-Wide-Band Workshop for Balkan Countries

Countries which were founded after the collapse of Yugoslavia have long tradition…

• 1 min read
Croatia , Cadence Academic Network , academic workshop , Balkan , academia , Virtuoso , university program

Breakfast Bytes

RISC-V: the Case For and Against

At the Linley Processor conference recently, there was a presentation about RISC…

• 7 min read
risc-v , linley processor conference , EEMBC , Linley , Krste Asanović , Breakfast Bytes , markus levy
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