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Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog
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Blog - Post List
Latest blogs

Computational Fluid Dynamics

Improving Mesh Adaption with Fidelity CFD

This blog post explores the concept of mesh adaptation and the latest mesh adaptation…

• 4 min read
CFD , Fidelity Hexpress , Fidelity CFD , simulation software , Meshing , Fidelity Pointwise , mesh adaptation

Corporate News

Introducing Fem.AI: Reshaping the Tech/AI Workforce for a More Equitable Future

The Cadence Giving Foundation was founded in 2022 to support critical needs in communities…

• 2 min read
Cadence Giving Foundation , featured , Cadence Cares , Fem.AI , AI , Women in Technology

System, PCB, & Package Design 

DesignCon Best Paper 2024: Addressing Challenges in PDN Design

Explore Impacts of Finite Interconnect Impedance on PDN Characterization Over…

• 1 min read
featured , DesignCon , PDN , signal integrity analysis , Signal Integrity , PDN Analysis , Sigrity

Corporate News

Cadence Tensilica HiFi 5 DSPs Used in NXP’s Next-Gen Audio DSP Family

In a significant achievement for the automotive industry, Cadence's Tensilica HiFi…

• 2 min read
Automotive , featured , Tensilica , AI/ML , technology

Digital Design

The Best Way to Learn – Cadence Cerebrus AI-Driven Design Implementation

The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, machine learning…

• 2 min read
digital badge , live training , cerebrus , Cadence training , cadence learning and support

Digital Design

Conformal ECO Designer

Conformal ECO Designer enables you to implement RTL engineering change orders (ECOs…

FormerMember • 1 min read
Conformal ECO Designer , conformal , RTL design

Verification

Training Insights – Palladium Emulation Course for Beginner and Advanced Users

The Cadence Palladium Emulation Platform is a hardware system that implements the…

• 2 min read
digital badge , live training , blended training , Palladium , Training Insights , online training

Verification

Flow Control Credit Updates in PCIe 6.1 ECN

As technology continues to evolve at a rapid pace, the importance of robust and efficient…

• 3 min read
Verification IP , PCIExpress , PCIe , pcie gen6 , PCIe 6.0 , verification

Life at Cadence

From Student Challenge to Professional Journey: An Intern’s Story at Cadence

At Cadence, we pride ourselves on fostering a culture of innovation and excellence…

• 3 min read
CFD , Insights on Culture , Cadence Culture , Computational Fluid Dynamics , Fidelity CFD

Verification

Use Verisium SimAI to Accelerate Verification Closure with Big Compute Savings

Verisium SimAI App harnesses the power of machine learning technology with the Cadence…

• 3 min read
Functional Verification , verisium , machine learning , SimAI , AI

Corporate News

Kalray Is Pioneering DPU Development

A leading provider of hardware and software solutions for data-centric applications…

• 1 min read
cerebrus , designed with cadence , Innovus Implementation

Verification

Maximizing Display Performance with Display Stream Compression (DSC)

Display Stream Compression (DSC) is a lossless or near-lossless image compression…

• 2 min read
resolution , DisplayPort , Display Stream Compression , lossless

Verification

Unlocking the Secrets of Next-Gen Verification

In the world of electronic design automation (EDA), verification is the glue that…

• 4 min read
Functional Verification , verisium , SimAI , Verisium Debug , xcelium , AI/ML , verification

Verification

Verisium SimAI: Maximizing Coverage, Minimizing Bugs, Unlocking Peak Throughput

Navigating the complexities of maximizing efficiency in random testing for designs…

• 2 min read
IP , cadence , verisium , SimAI

Corporate News

GlobalFoundries and Cadence Collaborate to Enable Design of the Digital World

The collaboration between GlobalFoundries (GF) and Cadence represents a powerful…

• 3 min read
featured , gf , GlobalFoundries , AI

Data Center

Why Does a Data Center Need a Digital Twin?

Recent advances in data center management demonstrate the limitations of traditional…

• 1 min read
featured , futurefacilities , AI data center , data center , digital twin , data center digital twin , AI factory , data center software , cooling

Digital Design

Unlocking the Concepts of IEEE 1801 Standard for Efficient Power Management

Power efficiency is a critical factor in the fast-evolving world of semiconductor…

• 4 min read
Low Power , IEEE 1801 , training , training bytes , UPF , Power Analysis

Computational Fluid Dynamics

Redefining Speed and Efficiency in Automotive CFD Workflows with Fidelity CFD

Automotive geometries tend to be intricate, often requiring “cleaning” before a final…

• 4 min read
Automotive , Computational Fluid Dynamics , Fidelity CFD , simulation software , Mesh Generation , preprocessing

Corporate News

Verisium SimAI: SoC Verification with Unprecedented Coverage Maximization

As hardware complexity increases, the limitations of traditional design verification…

• 1 min read
coverage , bugs , verisium , SimAI , xcelium , Regression
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