Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
• 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Analog/Custom Design

Virtuoso Video Diary: Creating and Previewing Stimuli

If you've ever tried to add stimuli to your design using the Stimuli form, you'll…

• 3 min read
ADE Explorer , stimuli form , stimuli , Virtuoso Analog Design Environment , ViVA , Virtuosity , ADE Blog Series , Custom IC Design , ADE Assembler , Stimuli Assignment form

Breakfast Bytes

Superhuman Photonic Design

I recently came across an article titled Generative Design Could Radically Transform…

• 3 min read
curvycore , Lumerical , silicon photonics , Virtuoso , photonics

Breakfast Bytes

TI's Experience Taping out with Pegasus

At the recent CDNLive Silicon Valley, Kyle Peavy of Texas Instruments (TI) presented…

• 5 min read
CDNLive , pegasus , DRC , design rule check , CDNLive Silicon Valley

Analog/Custom Design

Virtuoso Video Diary: Tune In to the MPT Video Channel

Tune In to the MPT Video Channel to check out a wide range of features easily accessible…

• 1 min read
ICADVM18.1 , video , Layout , Virtuoso , Virtuoso Video Diary , advanced nodes , multi-patterning technology , Custom IC

Whiteboard Wednesdays

Whiteboard Wednesdays - 3X Faster Design Closure with Quantus Integrated Virtual…

In this week's Whiteboard Wednesdays video, Senior Product Engineering Manager Varun…

• less than a min read
Whiteboard Wednesdays , Quantus , IVMF

Breakfast Bytes

Barefoot in a CloudBurst: Tempus on 2000+ CPUs

Barefoot Networks gave a couple of presentations at the recent CDNLive Silicon Valley…

• 5 min read
CDNLive , barefoot networks , cloudburst , cadence cloud , CDNLive Silicon Valley

Breakfast Bytes

Driving Dangerously

I've written a few times before about the fragility of neural networks, for example…

• 5 min read
Automotive , deep learning , tesla , ADAS , neural networks

Breakfast Bytes

Sunday Brunch Video for 7th April 2019

https://youtu.be/DUu3M30lilE Made at CDNLive Silicon Valley (camera Sean) Monday…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

Chiplets——重新定义系统设计

当下，电子行业经历着系统设计的新范式转变：传统的单片SoC电子系统设计思路正逐渐转变为使用chiplets（即“小芯片”）和高级封装技术的多芯片设计方法。这种逆转思维为系统设计开启了一个新的时代…

• less than a min read
SI , PI , Chinese blog , 电源完整性 , chiplets , 异质集成 , 中介层提取 , 系统设计 , IC封装设计 , 多芯片设计 , 高级封装 , 基于chiplets的系统 , 中文 , Sigrity , 信号完整性

The India Circuit

Simple Things You Can Do To Get Ahead In The Workplace

Recently we were lucky to have two of the women vice presidents at Cadence – Karna…

• 3 min read
International Women's Day , Women at Cadence , Cadence India , women leaders

Breakfast Bytes

RSA: Public Interest Technologists

Yesterday, I wrote about the first half of Bruce Schneier's keynote at the recent…

• 7 min read
security , policy , schneier

Analog/Custom Design

Virtuoso Video Diary: Checking EM Compliance Before Creating Layouts

How about checking your designs for electromigration (EM) compliance before creating…

• 2 min read
EAD , electromigration , ICADVM18.1 , electrically-aware design flow , Virtuoso electrically-aware design flow , EM , Virtuoso Layout Suite , IC6.1.8

Breakfast Bytes

RSA: Bruce Schneier

I have been following Bruce Schneier for a long time. He literally wrote the book…

• 5 min read
security , public interest technology , rsa , schneier

Academic Network

Best Paper Award at LATS2019 for Zhan Gao

The IEEE Latin-American Test Symposium (LATS) is an annual forum attended by professionals…

• 2 min read
Cadence Academic Network , academia , CDNLive EMEA , modus , imec

System, PCB, & Package Design 

BoardSurfers: Validating Your Shapes

Your design is near completion. Except that you’ve got an area of your plane shape…

• 5 min read
PCB Editor , PCB design and layout , Shape Checks , Allegro

Breakfast Bytes

Geoff Hinton, Yann LeCun, and Yoshua Bengio Win 2019 Turing Award

This year's Alan Turing Award goes to Geoff Hinton, Yann LeCun, and Yoshua Bengio…

• 4 min read
deep learning , turing award , neural networks , AI

Whiteboard Wednesdays

Whiteboard Wednesdays - When it Comes to Cloud-Based Design, One Size does Not Fit…

In this week's Whiteboard Wednesdays video, Tom Hackett describes how different types…

• less than a min read
Whiteboard Wednesdays , Cloud-based Design , cadence cloud

Breakfast Bytes

Bringing Clarity to System Analysis

Today, at CDNLive Silicon Valley, Lip-Bu Tan, Cadence's CEO, announced the Clarity…

• 4 min read
system analysis , 3d field solver , cloud , cadence cloud , Sigrity , clarity

Verification

Cadence Announces Continued Partnership With Northrop Grumman

On March 28th, 2019, Cadence Design Systems announced an expanded collaboration with…

• 1 min read
chip design , Functional Verification , press release , Northrop Grumman
CDNS - Fix Layout Hompage