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Featured

Life at Cadence

Cadence Giving Foundation Leads a Day of Collective Community Impact

On June 25, the Cadence Giving Foundation brought together an extraordinary coalition…

Corporate
Corporate 30 Jun 2026 • 2 min read
Cadence Giving Foundation , featured , san jose , Collective Impact Day , City Year Bay Area

Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
Corporate 25 Jun 2026 • 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
Corporate 24 Jun 2026 • 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
Corporate 23 Jun 2026 • 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA
cdns - all_blogs_categories

  • All 6439
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  • Artificial Intelligence 28
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  • Computational Fluid Dynamics 375
  • Data Center 60
  • Digital Design 465
  • Learning and Support 63
  • RF Engineering 116
  • SoC and IP 435
  • System, PCB, & Package Design  1018
  • Verification 1332
  • Cadence Japan 18
  • Physical Systems Simulation 25

  • CFD(数値流体力学) 45
  • 中文技术专区 9
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  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
  • PCB設計/ICパッケージ設計 61
  • RF /マイクロ波設計 45
  • Spotlight Taiwan 64
  • The India Circuit 93
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Breakfast Bytes

Autonomous Vehicles and the Semiconductor Industry: a Double-Edged Sword

A couple of weeks ago, I wrote about how automotive companies are going to need to…

Paul McLellan 8 Feb 2016 • 3 min read
Automotive , sidecar , lyft , ADAS , autonomous vehicles , general motors

System, PCB, & Package Design 

How to Maximize Performance When Your Package Layout Gets Complicated

We are all familiar with it. Every year, designs get faster, smaller, and more complicated…

ICPackagingPro 5 Feb 2016 • 6 min read
Cadence Design Systems , SiP , Digital SiP design , IC package design , APD , package design , Allegro Package Designer

Breakfast Bytes

Datacenter in a Can

Earlier this week I wrote about the Linley Data Center Conference and how Thermal…

Paul McLellan 5 Feb 2016 • 3 min read
microsoft , data center , google , thermal , cooling , power

Breakfast Bytes

"Thermal is the New Power" and Melting Butter with Your Phone

For some time now, SoC design groups have had to optimize PPA: performance, power…

Paul McLellan 4 Feb 2016 • 4 min read
thermal management , PPA , thermal , power

Breakfast Bytes

Linley Data Center Conference: FPGAs and ARMs in the Cloud

Next week, February 9-10, is the Linley Data Center Conference in the Santa Clara…

Paul McLellan 3 Feb 2016 • 4 min read
Altera , linley group , Linley , cloud , xilinx , ARM , datacenter , Breakfast Bytes , FPGA , cloud computing

Whiteboard Wednesdays

Whiteboard Wednesdays—Mapping Convolutional Neural Networks to the Vision P5 DSP

In this week's Whiteboard Wednesday, Chris Rowen explains how convolutional neural…

References4U 2 Feb 2016 • less than a min read
Vision P5 , Whiteboard Wednesdays , IP , Chris Rowen , Computer Vision , Tensilica , convolutional neural networks , CNNs , image processing

Academic Network

Cadence Academic Network Sponsors Build 18, an Annual Freestyle Tinkering Festival…

What happens when you challenge a group of electrical and computer engineering students…

susarla 2 Feb 2016 • 1 min read
build 18 , build , Cadence Academic Network , cmu , carnegie mellon univiersity

Breakfast Bytes

Modus Test Solution—Tests Great, Less Filling

Today Cadence announced the latest product in the "us" series of next-generation…

Paul McLellan 2 Feb 2016 • 4 min read
modus test , low pincount test , modus , Test , codec , 2D elastic compression , test compression , Breakfast Bytes

System, PCB, & Package Design 

Cadence Online Support – Empowering Learning! New Learnings from December 2015

Documentation plays a significant role in helping to understand the software. Cadence…

Jasmine 1 Feb 2016 • 5 min read
Cadence Online Support , IC package design , Cadence Help , Cadence Application Notes , RAKs , Allegro

Academic Network

How to Start as an IT Intern and Become a Cadence Employee

Here at Cadence we are very proud to provide internships to students and graduates…

Anton Klotz 1 Feb 2016 • 2 min read
Interns , Cadence Academic Network

SoC and IP

DesignCon Demonstration of IP for PCIe 4.0 and 16Gbps Multi-Protocol PHY

We enjoyed sharing our latest news with the many people who visited our booth at…

Steve Brown 29 Jan 2016 • less than a min read
DesignCon , PCIe Gen4 , pcie4 , Design IP and Verification IP , SerDes

Breakfast Bytes

Conway's Law and the Changing Structure of Automobile Companies

There is a law in business organization known as Conway's Law. This states that:…

Paul McLellan 29 Jan 2016 • 4 min read
Apple , organizational structure , google , tesla , automobile companies , conway's law

Breakfast Bytes

Moore's Law from 50,000 Feet

Moore's Law is in the news again since Intel, having maintained for years that nothing…

Paul McLellan 28 Jan 2016 • 5 min read
semiconductor economics , ray kurzweil , moore's law , kurzweil , NASA , Breakfast Bytes

Academic Network

Education Weeks in Abu Dhabi

Abu Dhabi, the capitol of United Arab Emirates (UAE), has a vibrant academic scene…

Anton Klotz 27 Jan 2016 • 2 min read
Cadence Academic Network , Abu Dhabi University , Virtuoso , microelectronics , university program

Breakfast Bytes

DesignCon: the 16Gbps Show

I always find DesignCon a slightly weird conference to attend. I swim in the semiconductor…

Paul McLellan 27 Jan 2016 • 5 min read
DesignCon , 16gbps , PCIe 4 , designcon16 , measurement , Signal Integrity , SerDes , Sigrity

Whiteboard Wednesdays

Whiteboard Wednesdays—Key Metrics for Embedded Neural Networks

In this week's Whiteboard Wednesdays video, Chris Rowen takes a closer look at the…

References4U 26 Jan 2016 • less than a min read
Whiteboard Wednesdays , IP , Chris Rowen , Tensilica , embedded neural networks

System, PCB, & Package Design 

What's Good About the Altium to Allegro PCB Editor Translator? It’s Now Available…

The current 16.6 HotFix now provides support for the Altium to Allegro PCB Editor…

Jerry GenPart 26 Jan 2016 • 2 min read
PCB , Allegro 16.6 , DEHDL , SPB , Design Entry HDL , PCB design , Grzenia , Allegro PCB Editor , Allegro

Breakfast Bytes

Misfit Shine 2 Lasts for 6 Months on a Coin Cell. How Do They Do That?

You can't go for very long without hearing about the Internet of Things (IoT) in…

Paul McLellan 26 Jan 2016 • 3 min read
ClariTek , IoT , Misfit , Shine 2 , Breakfast Bytes , Patrick Mannion

Breakfast Bytes

IEDM Examines Options for 5nm...Academics and Industry Examine the Options

At IEDM in December, there was a full-day course looking at the options for transistors…

Paul McLellan 25 Jan 2016 • 3 min read
transistors , interconnect , feol , carbon nanotube , optical interconnect , FinFET , beol , IEDM , Breakfast Bytes , devices
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