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Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

MBhatnagar
• 3 min read
ucie , Design IP , featured , TSMC , die-to-die

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

Corporate
• 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC

Corporate News

Building a Future Beyond Boundaries with Honda and Cadence

We at Cadence are proud to be a long-term partner of Honda R&D (HGRX), and our collaboration…

Corporate
• 6 min read
Automotive , featured , physical ai , automotive electronics , AI
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Blog - Post List

Latest blogs

Digital Design

2017 Annual HLS Survey Results

As many of you know, Cadence (more correctly, “I”) recently performed an industry…

• 4 min read
High-Level Synthesis , survey , Stratus , HLS

Breakfast Bytes

Rowen: How to Start an Embedded Vision Company

The last presentation that I'll cover in its own post from this year's Embedded Vision…

• 6 min read
Chris Rowen , Embedded Vision Summit , embedded vision , Tensilica , Breakfast Bytes

Breakfast Bytes

Bier Goggles: 1000X in 3 Years

Jeff Bier heads up the Embedded Vision Alliance (and, in his day job, he heads up…

• 4 min read
Embedded Vision Summit , deep neural networks , Embedded Vision Alliance , BDTI , dnn , neural networks , Breakfast Bytes

Breakfast Bytes

Deep Understanding, Not Just Deep Vision

The keynote on the second day of the Embedded Vision Summit was by Jitendra Malik…

• 10 min read
convolutional neural nets , dnn , neural networks , CNN , neural nets , Breakfast Bytes

Breakfast Bytes

Lifting the Veil on Hololens

The opening keynote at the Embedded Vision Summit in Santa Clara was by Marc Pollefeys…

• 7 min read
hololens , microsoft , Embedded Vision Summit , Tensilica , vision , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview June 5th to June 9th 2017

https://youtu.be/C7nOhT8ey7g Coming from Cadence Cafeteria (camera Sean) …

• less than a min read
DAC , 54dac , palldium , Protium , embedded vision , Embedded Vision Alliance , silicon photonics , #54dac , Design Automation Conference

Breakfast Bytes

Embedded Vision Summit: "It's a Visual World"

"It's a visual world," Tim Ramsdale of ARM said at one point in the recent Embedded…

• 12 min read
embedded vision , deep neural networks , Tensilica , convolutional neural networks , neural nets , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Vision C5 DSP: A Solution to Current Challenges and Trends…

In this week's Whiteboard Wednesdays video, Megha Daga talks about how Cadence did…

• less than a min read
Whiteboard Wednesdays , convolutional neural networks

Breakfast Bytes

Virtuoso System Design Platform

Cadence was already talking about chip-package-board back in 2000 when I was putting…

• 3 min read
package , board , 2.5D packagin , Virtuoso , 3D packaging , interposer , Sigrity , Custom IC , Breakfast Bytes , Allegro

Academic Network

10 years Academic Network at CDNLive EMEA, a Reason To Celebrate!

From 15-17 May CDNLive EMEA opened again its doors for around 700 attendees from…

• 5 min read
Cadence Academic Network , CDNLive , BarCamp , Functional Verification , academic workshop , academia , MEMS Design Contest , CDNLive EMEA , Cadence Design Contest , university program

Analog/Custom Design

Virtuoso Video Diary - Filtering Your Way Through Corners

Have you ever looked at the Corners Setup form and wished you had some way of finding…

• 4 min read
Analog Design Environment , ADE Explorer , Explorer , Analog Simulation , ADE , Virtuoso , Analog Design Environment , Virtuosity , Virtuoso Video Diary , Custom IC Design , ADE Assembler

Breakfast Bytes

HOT Party Remembers Gary Smith...and the Denali Party

Every year at DAC, Heart of Technology (HOT) organizes a charity event. This year…

• 2 min read
DAC , HOT , Heart of Technology , Gary Smith , sjsu , Design Automation Conference , Breakfast Bytes

System, PCB, & Package Design 

Epic Western Movies and PCB Design. Seriously.

I love that recently Westerns movies are making a comeback. Something about the romanticism…

• 2 min read
PCB , PCB Layout and routing , Routing , PCB Co-Design , Symphony , Team design , PCB Editor , PCB design , Allegro PCB Editor , Allegro

Breakfast Bytes

Open-Source Silicon

At the RISC-V workshop in Shanghai, the keynote on the second day was by Bunnie Huang…

• 12 min read
security , open source silicon , root of trust , bunnie huang , open source hardware , open source , Breakfast Bytes

Verification

Have You Fully Verified Your Multi-Core, Cache-Coherent SoC? Find Out How we Can…

You might have thought it would be “just another DAC” this year, again in Austin…

• 3 min read
DAC , SoC verification , Perspec , pss , Accellera PSS

Breakfast Bytes

What's For Breakfast? Video Preview May 29th to June 2nd 2017

https://youtu.be/xTdQCRRme8U Coming from Mexico City, Mexico (camera Yuan Yuan…

• less than a min read
hololens , microsoft , deep learning , embedded vision , Tensilica , Virtuoso

System, PCB, & Package Design 

How Your PCB Design Team Can Become Your Dream Team for Power Integrity

Cadence’s Sigrity team speaks to a lot of power integrity tool users. Experts in…

• 3 min read
PCB , PI , PDN , Power Integrity , Layout , Sigrity , simulation , Schematic

Breakfast Bytes

RISC-V Shanghai 二

This is my second (二 in Chinese) post about the 6th RISC-V workshop held in early…

• 8 min read
computer architecture , risc-v , isa , instruction set architectures , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Convolutional Neural Network Challenges: Bandwidth Requi…

In this week's Whiteboard Wednesdays video, Megha Daga takes a deep dive into bandwidth…

• less than a min read
Whiteboard Wednesdays , convolutional neural networks , bandwidth
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