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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

Breakfast Bytes

What's For Breakfast? Video Preview October 8th to 12th 2018

https://youtu.be/0CNhCWOxPKY Coming from TSMC OIP Ecosystem Forum, Santa Clara …

• less than a min read
Jasper User Group , microsoft , magestic , azure , machine learning , digital marketing , cadence cloud , ISO 26262 , esd alliance

Breakfast Bytes

Breakfast Buffet for September 2018

https://youtu.be/aWnEDVUQwoY The three highlighted posts for August were: The…

• less than a min read
CDNLive India , dna 100 , ambit design systems , ambit , Tensilica

System, PCB, & Package Design 

The Day a PCB Was Born

By John Burkhert Jr I want to take you back to a project that highlights a few…

• 6 min read
PCB , system level design , multiboard , system , PCB design , pcb system

Breakfast Bytes

TSMC OIP Virtual Design Environment

Today, it is TSMC's 2018 Open Innovation Platform (OIP) Ecosystem Forum in the Santa…

• 5 min read
OIP , tsmc oip vde , 7nm+ , TSMC , InFO , microsoft azure , aws , cadence cloud , 5nm

Whiteboard Wednesdays

Whiteboard Wednesdays - Significance of Sparsity in Neural Networks

In this week’s Whiteboard Wednesdays video, Megha Daga discusses how handling sparsity…

• less than a min read
Whiteboard Wednesdays , convolutional neural networks , neural networks , CNN

Breakfast Bytes

EDPS: Experience Teaching Undergraduates EDA

At the recent EDPS, Cadence's Patrick Groeneveld presented about a course that he…

• 4 min read
Stanford , EDA , EDPS , machine learning , ee292a

Breakfast Bytes

GlobalFoundries Executive Team Explains the Pivot

At the recent GlobalFoundries Technology Conference GTC there was a press and analyst…

• 8 min read
GTC , fdx , GlobalFoundries

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之6：平滑的弧形走线节省了柔板设计的走线设计时间

平滑的弧形走线是Cadence®Allegro®PCB Designer 17.2-2016的新功能，通过更有效的方法为用户提升设计效率。这一新功能在弧形走线的基础之上又得到了很大的提升…

• less than a min read
PCB , Chinese blog , Allegro 17.2 , 布线 , PCB设计 , 中文 , Allegro PCB Editor , Allegro PCB编辑器 , Allegro升级17.2 , 刚柔结合

Spotlight Taiwan

Taiwan Industry Celebrates IC 60th Anniversary

In 1958, Jack Kilby of Texas Instruments invented the integrated circuit, a historical…

• 1 min read
MOST , Taiwan , semi taiwan , semi , Lip-Bu Tan

Breakfast Bytes

Figure-Skating Champion Wins Kaufman Award

I never went to journalism school, but people get taught to open biographical articles…

• 7 min read
IBM , Kaufman Award , tom williams , synopsys , esd alliance

The India Circuit

CDNLive India 2018...err...Recorded, Not Live

Better late than never! If you missed CDNLive India 2018 which took place on Sep…

• less than a min read
CDNLive India , CDNLive

Breakfast Bytes

What's For Breakfast? Video Preview October1st to 5th 2018

https://youtu.be/dRLFFPgTjRM Coming from Times Square NY (camera Carey Guo) Monday…

• less than a min read
OIP , gobalfoundries , GTC , Wally Rhines , TSMC , EDPS , PCB West

System, PCB, & Package Design 

Winning With Fewer PCBs

By John Burkhert Jr The business world keeps score with dollars and cents. The…

• 5 min read
PCB , PCB system design , Allegro PCB DesignTrue DFM Technology , multiboard , PCB design , DFM

Breakfast Bytes

GTC: GlobalFoundries Pivots

Tuesday was the GlobalFoundries Technology Conference GTC. GF announced earlier in…

• 6 min read
GTC , fdx , GlobalFoundries

Breakfast Bytes

RF Design with Cadence Virtuoso and National Instrument's AXIEM

When cell-phones first became a consumer product, a VP of Nokia drew me an upside…

• 4 min read
RF , National Instruments , radio , Breakfast Bytes

The India Circuit

Never Lose Your Way Again With These Nifty Maps

CDNLive India took place a few weeks ago and we are just trying to catch our breath…

• 4 min read
artificial intelligence , CDNLive India , Netradyne , CDNLive , Edge Computing , HD mapping , machine learning , AI

Analog/Custom Design

Virtuoso - The Next Overture: Introducing Simulation Driven Routing

The new release of the Virtuoso platform (ICADVM18.1) offers groundbreaking analysis…

• 2 min read
Interactive Routing , EAD , Virtuoso Next , Virtuoso Overture , Virtuoso New Design Platform , electrically aware design , Simulation-driven interactive routing , Mixed-Signal , Layout , Virtuoso , Custom IC Design , Custom IC

Breakfast Bytes

CDNLive India: Invecas and FD-SOI

Today it is GTC, the GlobalFoundries Technology Conference. I will be there and I…

• 5 min read
foundation IP , 22fdx , Innovus , Invecas , GlobalFoundries , FD-SOI

Breakfast Bytes

EDPS: Design Process in Milpitas

For the second year, the Electronic Design Process Symposium (EDPS) took place in…

• 8 min read
eda education , deep learning , EDPS
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