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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

OnDemand links to our Allegro PCB & PSpice 2016 Webinars and looking to 2017...

As we wrap up 2016, I wanted to share the quick access links to all of our OnDemand…

• 2 min read

Breakfast Bytes

Silicon Photonics

You probably already know that much of the traffic inside the data center, and indeed…

• 9 min read
mach zehnder interferometer , waveguide , fiber optic , ring coupler , light , silicon photonics , mode , Breakfast Bytes

System, PCB, & Package Design 

What’s Good About Allegro PCB Editor New Concurrent Team Design? New Capabilities…

The 17.2 Allegro PCB Editor has new concurrent team design capabilities. For details…

• 3 min read
PCB , Cadence Design Systems , Allegro 17.2 , Allegro GUI , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor , Allegro

Breakfast Bytes

Branko's Elephant Chart

There are several areas where semiconductor technology and society come together…

• 5 min read
branko's elephant chart , world bank , global income distribution , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - Automotive Functional Safety and the ISO 26262 Standard

In this week's Whiteboard Wednesdays video, the second in a three-part series, Charles…

• less than a min read
Automotive , Whiteboard Wednesdays , functional safety , automotive electronics , Charles Qi , ISO 26262

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? New Design Level Checks! (Reason 9 of 10)

The Allegro PCB 17.2-2016 release is loaded with enhancements related to the DRILL…

• 2 min read
Allegro 17.2 , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Analog/Custom Design

Virtuoso Video Diary: Introducing the New Search Functionality in Hierarchy Edit…

Are you still crawling through the set of tabs, panes, or tables in the Hierarchy…

• 2 min read
Search , HED , Virtuoso Video Diary , hierarchy editor

Breakfast Bytes

RISC-V: Codasip, BaySand, and More

Recently the RISC-V Fifth Workshop took place at Google in Mountain View. As always…

• 3 min read
UltraSoC , risc-v , codasip , BaySand , Codeplay , Breakfast Bytes

Breakfast Bytes

Lip-Bu Tan Receives the Exemplary Leadership Award from GSA

Last week, Lip-Bu Tan, the CEO of Cadence, received the Dr. Morris Chang Exemplary…

• 5 min read
gas , cadence , fsa , fabless , TSMC , Lip-Bu Tan , morris change exemplary leadership award , Morris Chang , Breakfast Bytes

Academic Network

Meet the BarCamp Concept!

BarCamp was inspired by an invitation-only participant-driven conference, named Foo…

• 2 min read
virtual platforms , Cadence Academic Network , BarCamp , Formal AMS Verification , System-level Sensitivity Analysis , edaBarCamp , Highly distributed embedded platforms

Breakfast Bytes

IEDM: 7nm from TSMC and IBM/GLOBALFOUNDRIES/Samsung

At IEDM last week, there were papers in eight parallel tracks for three days. At…

• 3 min read
IBM , Samsung , TSMC , 193i , FinFET , GlobalFoundries , 7nm , EUV , Breakfast Bytes

Analog/Custom Design

Virtuoso Video Diary: Using the New IE-Card Based Setup in ADE Explorer

Interface Element (IE) Setup can be one of the most challenging parts in AMS Designer…

• 5 min read
Analog Design Environment , ADE Explorer , AMS in ADE , AMS Designer , IE Card Setup , ADE , Virtuoso Video Diary

Breakfast Bytes

Tensilica at CES: Hololens Will Be There, Will You?

It's a new year soon. And that means New Year Resolutions. I will go to the gym.…

• 3 min read
hololens , Consumer Electronics Show , CES , vision processing , ADAS , autonomous vehicles , Breakfast Bytes , HiFi Audio

System, PCB, & Package Design 

How to Tailor Your PCB and IC Package Modeling With "Cut and Stitch" to Generate…

As an experienced SI expert, you likely apply multiple solvers and simulators to…

• 3 min read
3D full wave extraction , cut and stitch , Signal Integrity , serial link compliance , SerDes , Sigrity , PowerSI

Breakfast Bytes

Can Computers Think? Or Understand Chinese?

I have been working with computers for a long time. I first learned to program in…

• 5 min read
searle , artificial intelligence , Chinese room , Turing test , neural nets , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview December 12th to 16th

https://youtu.be/wtOOIg32ma8 Monday: Lip-Bu Tan is honored by GSA with the Maurice…

• less than a min read
risc-v , codasip , IBM , branko's elephant chart , Samsung , TSMC , gf , Lip-Bu Tan , silicon photonics , photonics , gsa , GlobalFoundries , 7nm , IEDM , maurice chang

Breakfast Bytes

IEDM: The Big Decisions for 5nm

The Sunday of IEDM there were two all-day short courses . The one I attended was…

• 6 min read
SADP , gas , contact liner , horizontal nanowire , lelele , lex , 193i lithography , cobalt , copper , contact , LELE , FinFET , 5nm , le2 , nanowire , vertical nanowire , le3 , EUV , IEDM , gate all around , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays—What's New with PCI Express Gen4

In this week's Whiteboard Wednesdays video, the last of a 3-part series, Lana Chan…

• less than a min read
Whiteboard Wednesdays , PCIe Gen4 , PCIe

Verification

Perspectives on Developing EDA Standards

Last week, my colleague Paul McLellan published a blog post on the standardization…

• 4 min read
uvm , 1394 , pswg , Perspec , OVM , USB , IEEE 1500 , Accellera , VCX , VCi , PCI , portable stimulus
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