System Design and Verification Blogs

We all know that a common language is the basis for every collaborative activity. This is true of natural languages and formal languages alike. In engineering, and specifically in the domain of hardware design/verification, domain languages and forma...

Three years ago, PSS (Portable Test and Stimulus) specification 1.0 was released and started to reshape the way design and verification engineers think about SoC level verification and testing. It took a noble idea of creating a single repr...

The Cadence tool flow is the most comprehensive flow around. If there is an EDA need, you can rest assured that Cadence has a tool that covers that need, and you can be certain that it integrates into the rest of the flow smoothly. In fact, Cadence t...

A little bit of everything in the blog today: PSS is All Over As someone that was involved with UVM and PSS, both becoming Accellera standards, it is exciting to see both growing independently and together. With PSS we had a massive amount of papers ...

Vegas, here we come. All of us fun EDA engineers at once. Be prepared, next week’s Design Automation Conference will be busy! The trends I had outlined after last DAC in 2018—system design, cloud, and machine learning—have...

In my predictions for 2018 I had identified five key trends driving verification in 2018 – Security, Safety, Application Specificity, Processor Ecosystems and System Design Enablement, all centered around ecosystems. Looking back now as the yea...

Cadence continues to be a leader in SoC verification and has expanded our industry investment in Accellera portable stimulus language standardization. Some customers have expressed reservations that portable stimulus requires the effort of learn...

Learn about the challenges and solutions for integrating and verification PCIe(r) Gen4 into an Arm-Based Server SoC. Listen to this relatively short webinar by Arm and Cadence, as they describe the collaboration and results, including methodology and...

Cadence pulled a fast one at DAC 2018, almost like a bait and switch. We advertised a hands-on workshop to learn about Accellera Portable Stimulus Specification (PSS) v1.0. But we made participants compete head to head, for prizes, and their pride! T...

There’s nothing like the heat of a DAC demo to stress new technology and the engineers behind it! Such was the case at DAC 2018 at the new locale of Moscone Center West, San Francisco. Cadence and AMIQ were two of several vendors who announced ...

CDNLive is a user conference, and verification is one of the largest categories of content with multiple tracks covering multiple days. Portable stimulus is one of the hottest new areas in verification, and continues to be popular in all venues. At l...

The Accellera Portable Stimulus Working Group met at the DVCon 2018 to move the process forward towards ratification. While we can't predict exactly when it will be ratified, the goal is now more clearly in sight! Cadence booth was busy with a lo...

The Cadence® Connections® Verification Program brings together a worldwide network of services, training, and IP development experts that support Cadence verification solutions. The program members help customer accelerate the adoption of new...

It’s always good to hear what real users think of products. Here is a very detailed review (~4000 words) by an Anonymous user, nick named Ant-Man (from the movie). Overall it’s a very strong endorsement of Perspec, and summarize...

It’s now official: Perspec System Verifier is rated the #1 product in the #1 category of Portable Stimulus, according to the 2017 EDA User Survey published on Deepchip.com . There were 33 user responses in favor of Perspec as the #1 tool, and dr...

Here we conclude the blog series and highlight the results of Mediatek 's use of Cadence Perspec™ System Verifier for their SoC level verification. In case you missed it, Part 1 of the blog is here , and Part 2 of the blog is here . One of their...

It’s been quite a long 5-year journey building and deploying Performance Analysis, Verification, and Debug capabilities for Arm-based SoCs. We worked with some of the smartest engineers on the planet. First with the engineers at Arm, with whom we...

As the stakes for winning server segment market share grow ever higher an increasing number of companies are seeking to grasp the latest Holy Grail of multi-chip coherence. The approach promises to better enable applications such as machine learning,...

Recently, Renesas combined the Cadence® Interconnect Workbench, the Cadence vManager™ Metric-Driven Signoff Platform, and the Cadence Palladium® Z1 Enterprise Emulation Platform to improve their performance validation flow. They were looking for a better...

Next month at Arm TechCon, one of the key discussion topics with be the internet of things (IoT), especially after Masayoshi Son, Arm's "parent" Softbank’s CEO, took the stage last year and boldly predicted that “more important, in...

One category of difficult SoC tests to create are stress tests, to validate the limits of SoC functionality and its behavior in this scenario. It’s usually not overloading a data input port that is challenging; something that can be accomplished with...

Multi-core, coherent SoCs are very complex and verifying their behavior requires a system level perspective that is not easily acquired. As more devices incorporate the coherent multi-core architecture out of competitive necessity, organizations are grappling...

The Accellera Portable Stimulus Standard (PSS) is experiencing growing customer interest, and generating a host of questions. In this blog Sharon Rosenberg details the modeling of state machines using the PSS in order to perform low power SoC verification...

Here we go through the application of Cadence Perspec™ System Verifier by Mediatek for their SoC level verification. In case you missed it, Part 1 of 3 can be found here . As shown in Figure 5 , the tests are generated automatically from the model...

Mediatek has been using the Cadence Perspec™ System Verifier for their SoC level verification. At a recent CDNLive , Mediatek reported on their experience with Perspec and the results from their first phase of deployment. Their primary goal in adopting...