Cadence Community

What’s Hot in Verification at this Year’s CDNLive? It’s Portable Stimulus Again!

By Steven Brown | 27 Mar 2018

CDNLive is a user conference, and verification is one of the largest categories of content with multiple tracks covering multiple days. Portable stimulus is one of the hottest new areas in verification, and continues to be popular in all venues. At l...

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CDNLive | Perspec | pss | portable stimulus
Preparing Accellera Portable Stimulus Standard for Ratification

By Steven Brown | 13 Mar 2018

The Accellera Portable Stimulus Working Group met at the DVCon 2018 to move the process forward towards ratification. While we can't predict exactly when it will be ratified, the goal is now more clearly in sight! Cadence booth was busy with a lo...

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pswg | Perspec | perspec system verifier | pss | portable stimulus
Cadence Collaborates with Test & Verification Solutions on Portable Stimulus

By Steven Brown | 18 Jan 2018

The Cadence® Connections® Verification Program brings together a worldwide network of services, training, and IP development experts that support Cadence verification solutions. The program members help customer accelerate the adoption of new...

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CDNLive | Test | DVcon | pss | verification
Portable Stimulus User Gives Perspec PSS Technology Nearly Perfect Review

By Steven Brown | 8 Jan 2018

It’s always good to hear what real users think of products. Here is a very detailed review (~4000 words) by an Anonymous user, nick named Ant-Man (from the movie). Overall it’s a very strong endorsement of Perspec, and summarize...

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Perspec System Verifier is #1 in Portable Stimulus in 2017 User Survey

By Steven Brown | 1 Dec 2017

It’s now official: Perspec System Verifier is rated the #1 product in the #1 category of Portable Stimulus, according to the 2017 EDA User Survey published on Deepchip.com . There were 33 user responses in favor of Perspec as the #1 tool, and dr...

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Mediatek Deploys Perspec for SoC Verification of Low Power Management (part 3 of 3)

By Steven Brown | 16 Oct 2017

Here we conclude the blog series and highlight the results of Mediatek 's use of Cadence Perspec™ System Verifier for their SoC level verification. In case you missed it, Part 1 of the blog is here , and Part 2 of the blog is here . One of their...

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uvm | Perspec | coherent | perspec system verifier | coherency library | coherency | Accellera | mediatek | ARM | pss | portable stimulus
Celebrating Five Years of Performance-Optimized Arm-Based SoCs: Now including AMBA5

By Steven Brown | 12 Oct 2017

It’s been quite a long 5-year journey building and deploying Performance Analysis, Verification, and Debug capabilities for Arm-based SoCs. We worked with some of the smartest engineers on the planet. First with the engineers at Arm, with whom we...

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iwb | interconnect | amba5 | Interconnect Workbench | Palladium | Performance Analysis | AMBA | CoreLink | xcelium | ARM
When Arm meets Intel – Overcoming the Challenges of Merging Architectures on an SoC to Enable Machine Learning

By Steven Brown | 29 Sep 2017

As the stakes for winning server segment market share grow ever higher an increasing number of companies are seeking to grasp the latest Holy Grail of multi-chip coherence. The approach promises to better enable applications such as machine learning,...

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SoC verification | perspec system verifier | Accellera | pss | portable stimulus
Making it Easier to Apply Palladium Z1 to SoC Performance Analysis

By XTeam | 23 Sep 2017

Recently, Renesas combined the Cadence® Interconnect Workbench, the Cadence vManager™ Metric-Driven Signoff Platform, and the Cadence Palladium® Z1 Enterprise Emulation Platform to improve their performance validation flow. They were looking for a better...

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Interconnect Workbench | customer feedback | success story | Palladium | Renesas
How to Get to a Trillion Devices in the Internet of Things in 2035

By Frank Schirrmeister | 12 Sep 2017

Next month at Arm TechCon, one of the key discussion topics with be the internet of things (IoT), especially after Masayoshi Son, Arm's "parent" Softbank’s CEO, took the stage last year and boldly predicted that “more important, in...

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prototyping | cadence | palladium z1 | IoT | Socrates | Emulation | Internet of Things | ARM | protium s1 | verification
How To Create L3 Cache Command Overflow Stress Test in Less Than 2 Days

By Steven Brown | 5 Sep 2017

One category of difficult SoC tests to create are stress tests, to validate the limits of SoC functionality and its behavior in this scenario. It’s usually not overloading a data input port that is challenging; something that can be accomplished with...

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TAGS:

SoC verification | perspec system verifier | Accellera | pss | portable stimulus
Do You Have The Tools You Need To Verify Your ARM Multi-core, Coherent SoC?

By Steven Brown | 21 Aug 2017

Multi-core, coherent SoCs are very complex and verifying their behavior requires a system level perspective that is not easily acquired. As more devices incorporate the coherent multi-core architecture out of competitive necessity, organizations are grappling...

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TAGS:

SoC verification | perspec system verifier | Accellera | ARM | pss | portable stimulus
How to Model State Machines in the Accellera Portable Stimulus Standard for Low Power SoC Verification

By Steven Brown | 4 Aug 2017

The Accellera Portable Stimulus Standard (PSS) is experiencing growing customer interest, and generating a host of questions. In this blog Sharon Rosenberg details the modeling of state machines using the PSS in order to perform low power SoC verification...

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Low Power | SoC verification | perspec system verifier | Accellera | pss | portable stimulus
Mediatek Deploys Perspec for SoC Verification of Low Power Management (part 2 of 3)

By Steven Brown | 13 Jul 2017

Here we go through the application of Cadence Perspec™ System Verifier by Mediatek for their SoC level verification. In case you missed it, Part 1 of 3 can be found here . As shown in Figure 5 , the tests are generated automatically from the model...

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TAGS:

uvm | Perspec | coherent | perspec system verifier | coherency library | coherency | Accellera | mediatek | ARM | pss | portable stimulus
Mediatek Deploys Perspec for SoC Verification of Low Power Management

By Steven Brown | 12 Jul 2017

Mediatek has been using the Cadence Perspec™ System Verifier for their SoC level verification. At a recent CDNLive , Mediatek reported on their experience with Perspec and the results from their first phase of deployment. Their primary goal in adopting...

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TAGS:

uvm | Perspec | coherent | perspec system verifier | coherency library | coherency | Accellera | mediatek | ARM | pss | portable stimulus
See Perspec Running Accellera Portable Stimulus Examples Here and Now!

By Steven Brown | 15 Jun 2017

Accellera has announced the release of an Early Adopter specification of the Portable Stimulus Standard (PSS) for public review. First introduced in detail at DVCON 2017, it will be the subject of a tutorial at DAC 2017 . We receive many questions about...

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TAGS:

SoC verification | perspec system verifier | Accellera | pss | portable stimulus
Accellera Has Done It Again! Portable Stimulus Standard Available For Review

By Steven Brown | 15 Jun 2017

In a press release this morning, Accellera announced availability of an Early Adopter specification of the Portable Stimulus Standard (PSS) for public review, just in time for DAC 2017 in Austin! Public review of the PSS specification will end September...

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TAGS:

CDNS | Perspec | Accellera | pss | portable stimulus
Have You Fully Verified Your Multi-Core, Cache-Coherent SoC? Find Out How we Can Help @ DAC!

By Steven Brown | 24 May 2017

You might have thought it would be “just another DAC” this year, again in Austin, where the food and live entertainment is undeniably superb. But wait, there’s help for improving verification of your cache coherent multi-core SoC, one of the biggest challenges...

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DAC | SoC verification | Perspec | pss | Accellera PSS
SoC Verification with Portable Stimulus Using Perspec System Verifier

By Steven Brown | 23 Apr 2017

This year’s CDNLive San Jose was another gem. Many great keynotes, customer presentations, and technical updates. There were several mentions of Machine Learning, both in general about the emergence of Artificial Intelligence in the world, and specifically...

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TAGS:

SoC verification | Perspec | perspec system verifier | Qualcomm | portable stimulus
A Seamless Path to the Portable Stimulus Standard

By tomacadence | 23 Mar 2017

In our last blog post , we reviewed some of the activities at the recent Design and Verification Conference and Exhibition ( DVCon ) in San Jose. Portable stimulus was clearly one of the hot topics at the event, with a tightly packed room for the "Creating...

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TAGS:

uvm | prototyping | pswg | Acceleration | Functional Verification | Perspec | System Design and Verification | Palladium | SoC | Emulation | Simulation acceleration | DVcon | Accellera | metric-driven verification | Hardware/software co-verification | portable stimulus | simulation | verification
Portable Stimulus Shines at DVCon

By tomacadence | 4 Mar 2017

For me, this week was almost entirely consumed with the Design and Verification Conference and Exhibition ( DVCon ) at the familiar DoubleTree in San Jose. The hotel has replaced its chandeliers with shiny new space-age fixtures, but otherwise, I felt at...

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TAGS:

uvm | prototyping | pswg | Acceleration | Functional Verification | Perspec | System Design and Verification | Palladium | SoC | Emulation | Simulation acceleration | DVcon | Accellera | metric-driven verification | Hardware/software co-verification | portable stimulus | simulation | verification
What Sort of Bugs Does Portable Stimulus Find?

By tomacadence | 17 Feb 2017

In a recent blog post , we discussed some general concepts of bugs, problems, issues, and features. We gave examples of different types of bugs typically found during the functional verification of chip designs, and made the claim that “portable stimulus...

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hardware-software co-verification | uvm | Low Power | pswg | debug | Functional Verification | System Design and Verification | embedded software | Emulation | Accellera | Hardware/software co-verification | debugging | portable stimulus | interrupts
Preview of an Exciting DVCon

By tomacadence | 2 Feb 2017

In the overall world of EDA, the Design Automation Conference ( DAC ) is the biggest annual event for the industry. Nothing against DAC, but if you’re involved in functional verification as I am, the Design and Verification Conference and Exhibition (...

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TAGS:

uvm | prototyping | pswg | Acceleration | Functional Verification | Perspec | System Design and Verification | Palladium | SoC | Emulation | Simulation acceleration | DVcon | Accellera | metric-driven verification | Hardware/software co-verification | portable stimulus | simulation | verification
Bare Metal Tests and Hardware-Software Co-Verification

By tomacadence | 23 Jan 2017

One interesting question that arises from time to time is whether the Cadence® Perspec ™ System Verifier can verify software as well as hardware. The question is simple enough, but the answer is more complex. There are at least two versions of “yes...

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hardware-software co-verification | uvm | pswg | Acceleration | Perspec | virtual platform | System Design and Verification | Emulation | System simulation and analysis | Accellera | FPGA prototypes | testbench | portable stimulus | silicon | bare metal | verification
Bugs, Problems, Issues, and Features

By tomacadence | 4 Jan 2017

There’s no better way to demonstrate the value of a verification tool than to find a killer bug in the customer’s design. When the verification engineer looks up from the screen and says, “Wow – we might never have found that!” we EDA vendors are equally...

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TAGS:

performance | uvm | pswg | Functional Verification | Perspec | OVM | issue | bug | feature | Accellera | Problem | portable stimulus

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