Find Other Members ►

Get email delivery of the Cadence blog (individual posts).

Community

Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

Breakfast Bytes: July 4th: The Glorious Revolution

Paul McLellan

The Fourth of July is coming up. Cadence is closed for a four-day weekend, so this is the last day before a break, and so it is time to talk about something off-topic. Well, not that off-topic since I'm going to talk about Independence Day and what t...
- 2 Jul 2020
Breakfast Bytes: Japanese Arm-Powered Supercomputer Takes the TOP500 Crown

Paul McLellan

Twice a year, around the middle of the year (that would be now) and around the end of the year, the Top 500 List is published. This lists the 500 most powerful supercomputers in the world. In one sense, this is as much about bragging rights as anythi...
- 1 Jul 2020
Analog/Custom Design: Virtuoso IC6.1.8 ISR12 and ICADVM18.1 ISR12 Now Available

Virtuoso Release Team

The IC6.1.8 ISR12 and ICADVM18.1 ISR12 production releases are now available for download.
- 1 Jul 2020
Breakfast Bytes: Alessandra Nardi Receives Marie Pistilli Award for Women in EDA

Paul McLellan

Cadence's Alessandra Nardi, software engineering group director, is the 2020 recipient of the Marie R. Pistilli Women in Electronic Design Award, an annual honor that recognizes individuals who have significantly helped advance women in electron...
- 30 Jun 2020
System, PCB, & Package Design : IC Packagers: Accelerate Complex Degassing with 17.4

Tyler

Degassing, other times called outgassing, is a common operation in IC package and interposer designs. As the name implies, the technology allows for gases to escape during the manufacturing process and prevent bubbling. It has a second benefit &ndash...
- 30 Jun 2020
System, PCB, & Package Design : BoardSurfers: Good News for Japanese Readers

Dishika Majumdar

In this blog, I’m going to share some great news for our Japanese readers. Let's find out what it is…
- 30 Jun 2020
Life at Cadence: The Returnship Journey — Part 1

Ale Costa

Life happens! Depending on the circumstances, we must sometimes press the “pause” button on our careers. Rejoining the workforce is not always easy, especially when taking a longer break. The journey back to work is even more challenging ...
- 29 Jun 2020
定制IC芯片设计 : Virtuoso Meets Maxwell: 电磁分析魔法化

kfullerton

我们为什么要在virtuoso RF 解决方案中进行EM Analysis？如果您看过魔术表演，就会知道它就像魔术师一样可以把不可能变成可能。如果您曾因为繁琐的EM集成而烦恼，那么请进一步阅读以了解我们最新开发的功能！
- 29 Jun 2020
Learning and Support: Looking to Learn About Virtuoso ADE Product Suite? We’ve Got a Webinar for You!

XTeam

Interested in the Virtuoso ADE Product Suite? Cool! We’ve got a great webinar for you. Not sure why you should be interested in Virtuoso ADE Product Suite? Well, ISO standards are changing, and with the advent of advanced-node designs and harde...
- 29 Jun 2020
Digital Design: Voltus Voice: A New Blog Series to Discover the “Power” Within

Priya E Joseph

Voltus Voice is a blog series aimed at showcasing the diverse Voltus technologies to achieve high-performance, accuracy, and capacity for next-gen chip designs.
- 29 Jun 2020
Digital Design: Library Characterization Tidbits: Did Your Search for Constraints Fail?

AbhaRawat

While using the Cadence Liberate Characterization solution or the Liberate Variety statistical characterization solution, have you encountered a situation where the search for constraints failed to return results within the specified range of arcs and then the related cell was marked as failed? If yes, then do read this blog.
- 29 Jun 2020
カスタムIC／ミックスシグナル: Start Your Engines: UNLでアナログ・ブロックにSpectreネットリストを生成する理由と方法

Custom IC Japan

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Enginesブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。 AMS Designe...
- 29 Jun 2020
Breakfast Bytes: Yesterday Was Tau Day

Paul McLellan

You probably know that 3/14 is Pi Day, since pi (π) starts 3.14 and so matches the date, at least the way it is written in the US but not in the rest of the world. Well, yesterday was Tau Day, 6/28. Tau (τ) is 2π and so is 6.28. Some mathem...
- 29 Jun 2020
Verification: Improving Tests Efficiency Using Coverage Callback (part 2)

teamspecman

In recent blogs - specman-callback-coverage-api and improving-tests-efficiency-using-coverage-callback - we shared some ideas about how to employ the new Coverage Callback API for increasing the tests efficiency. This blog shows two more ideas for improving tests, using runtime coverage information.
Stop the Run After the Goal Is Reached
The basic concept of Coverage Driven Verification is running many random tests, and…
- 28 Jun 2020
Breakfast Bytes: Sunday Brunch Video for 28th June 2020

Paul McLellan

https://youtu.be/va13w0mgAco Made "under the sea" (camera Carey Guo) Monday: Make a DATE for the Alps Next Ski Season Tuesday: vManager: One Manager to Rule Them All Wednesday: Computational Digital Software Thursday: Under the Hood of Genu...
- 28 Jun 2020
Digital Design: Curious About the Newly Released Innovus Implementation System v20.1?

VNelson
We recently released the Innovus v20.1 software and you might be interested in learning about what's new or changed in the software.

Here are some suggestions to get you up to speed:

The best place to find all the details of the changes relative to v19.1, is to refer to the What's New document on the Cadence support site.

If you want a quick intro to the 20.1 graphical user interface, view this demo that I created…
- 26 Jun 2020
System, PCB, & Package Design : BoardSurfers: Allegro In-Design Return Path Analysis: Find and Visualize Return Path Issues

Shirin Farrahi

Return path issues are common and difficult to diagnose in complex printed circuit board designs. In the worst case, a signal could have no DC return path, and your circuit will be open at the lowest frequencies. In other cases, a poor return path ca...
- 26 Jun 2020
Life at Cadence: My Life at Cadence Video Series: Komal Gujarathi

Mary Kasik

Cadence recently interviewed five of our amazing women engineers for a new video series titled “My Life at Cadence”! This third video features Komal Gujarathi, software engineer. The first time I wrote a small program, I was so exci...
- 26 Jun 2020
Breakfast Bytes: Cornami and Trusted Data

Paul McLellan

Recently, I wrote about Fully Homomorphic Encryption (FHE from now on) which I think is going to be something big that you will hear lots about in the future. Here's the reason I think it is going to be big. The people who care the most about securit...
- 26 Jun 2020
Academic Network: Digital Design and Signoff Training Deep Dive: Part 3 – Silicon and Signoff Verification

Kira Jones

We’re excited to share the last blog for the Digital Design and Signoff Training Deep Dive. We’ve shared the courses you need to take for Synthesis and Test, and Implementation, now we’re going to share the courses for Silicon and S...
- 25 Jun 2020
カスタムIC／ミックスシグナル: Start Your Engines: AMSD Flex – 最新のSpectreの機能にすぐにアクセスできます！

Custom IC Japan

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Enginesブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。 Bonjou...
- 25 Jun 2020
Breakfast Bytes: Under the Hood of Genus

Paul McLellan

From time to time people ask how EDA tools work under the hood. I think the question is more along the lines of "what is all that stuff in the front of my car?" more than "how does ignition advance work?" So here's what's ...
- 25 Jun 2020
定制IC芯片设计 : Virtuosity：您的版图设计是否结构正确？

KomalJohar

您的设计是否结构正确？阅读此博客，以了解在设计过程中，如何使用宽度间距模式（WSPs），实现结构正确的设计。 WSPs 的追踪线，为快速创建连接线提供指导。定义WSPs以捕获宽度和间距规则，并且确保这些连接线满足捕获到的设计规则。
- 24 Jun 2020
System, PCB, & Package Design : IC Packagers: How to Fix Padstacks that Aren’t Showing All Their Layers

Tyler

We talked a few months ago regarding why flip-chip padstacks are single layer pads in your design. Today, I wanted to spend just a few minutes looking at a variation on this issue that has come across my inbox more than once since that post went up. ...
- 24 Jun 2020
Breakfast Bytes: Computational Digital Software

Paul McLellan

Cadence has been using the term "computational software" to unify many of the algorithms that underlie EDA tools. I think that the area where this is clearest is the digital full flow, which starts at synthesis, though physical design, and ...
- 24 Jun 2020

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.