• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Community Forums
  3. Cadence Community
Cadence Community
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • Site
  • Search
  • User
Find Other Members ►
Subscriptions
Get email delivery of the Cadence blog (individual posts).
  • Twitter
  • Facebook
  • LinkedIn
  • Google+

Community


Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

  • Cadence Showcases PCIe 7.0-Ready IP at PCI-SIG Developers Conference 2023

    SoC and IP: Cadence Showcases PCIe 7.0-Ready IP at PCI-SIG Developers Conference 2023

    Arif Khan
    Arif Khan
    PCIe 7.0 continues to progress through draft stage, IP enablement begins

    The PCI-SIG announced that the PCI Express (PCIe) 7.0 specification has hit version 0.3 at the annual Developers Conference in Santa Clara on June 13, 2023. This represents a further doubling of the data rate to 128GT/s. The standard is expected to be finalized in 2025.

     The PCIe standard has doubled the data rate approximately every three years…
    • 14 Jun 2023
  • MLベースのSpectre FMC解析を利用したワーストケースでの設計不良の早期・正確・迅速な調査とデバッグ

    カスタムIC/ミックスシグナル: MLベースのSpectre FMC解析を利用したワーストケースでの設計不良の早期・正確・迅速な調査とデバッグ

    Custom IC Japan
    Custom IC Japan
    より小さなジオメトリを持つプロセス・ノードは、SoCに多くの機能を組み込むことができるため、チップ・メーカーやOEMを常に惹きつけてきました。しかし、より小さなトランジスタを使用すると、複雑さが増し、IC設計エンジニアに多くの課題を突きつけます。先端ノードでは、プロセスのばらつきが大きいため、高い歩留まりを確保することは非常に困難です。主に歩留まりは収益性の判断に役立ち、品質を明確に示すため、半導体製造において重要な役割を担っています。積極的なプロセス微細化の目的は、高い歩留まりが確保され検証さ...
    • 14 Jun 2023
  • Anirudh Devgan Shares Industry Insights with CNBC’s Jim Cramer of Mad Money

    Corporate News: Anirudh Devgan Shares Industry Insights with CNBC’s Jim Cramer of Mad Money

    KT Moore
    KT Moore
    As a longtime Cadence employee and a longtime viewer, I was thrilled to watch Cadence president and CEO Anirudh Devgan sit down with CNBC’s Jim Cramer for a special episode of Mad Money.  With his well-known exuberance, Jim introduced Cade...
    • 14 Jun 2023
  • What's New In Fidelity 2023.1

    Computational Fluid Dynamics: What's New In Fidelity 2023.1

    JoshuaS
    JoshuaS
    Fidelity 2023.1 is here, and this is one of our biggest releases yet. You'll find a variety of enhancements to performance, memory, and usability that will streamline your workflow and deliver CFD simulation results quickly. Aside from those enha...
    • 14 Jun 2023
  • Training Insights: Bridging the Skill-Gap with the New Cadence Training Digital IC Design Fundamentals (DICDF)

    Verification: Training Insights: Bridging the Skill-Gap with the New Cadence Training Digital IC Design Fundamentals (DICDF)

    prabhab
    prabhab

    The world is reeling towards AI/ML newer planes, and our EDA world is adding these technologies into their tools and rising to the occasion. This has created a lot of additional opportunities within the semiconductor industry in terms of newer technologies, employment, and training. But we are still witnessing a global crisis of skill gap in the semiconductor industry, which is seen as a challenge when hiring graduates…

    • 14 Jun 2023
  • Coverage Closure – A Progression Instead of Just a Destination

    Verification: Coverage Closure – A Progression Instead of Just a Destination

    Anika Sunda
    Anika Sunda
    The testing and verification of a complex hardware or software system, such as modern integrated circuits found in everything from smartphones to servers, can be a difficult process. One of the most difficult and time-consuming tasks a verification t...
    • 13 Jun 2023
  • Training Webinar: Microwave Office - Comprehensive RF and Microwave Design Creation

    RF Engineering: Training Webinar: Microwave Office - Comprehensive RF and Microwave Design Creation

    John Dunn
    John Dunn
    A training webinar on Microwave Office will be given June 27, 2023. The emphasis will be on EM simulation.
    • 12 Jun 2023
  • Start Your Engines: ミックスシグナルモデリングでelectrical信号をlogic値に変換するベストプラクティス

    カスタムIC/ミックスシグナル: Start Your Engines: ミックスシグナルモデリングでelectrical信号をlogic値に変換するベストプラクティス

    Custom IC Japan
    Custom IC Japan
    Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により、ミックスシグナル・デザイン検証を「活性化」し、市場競争でチェッカーフラッグを受けることができます。Start Your Enginesブログ・シリーズは、シミュレーションのパフォーマンスをチューンアップし、生産性向上に役立つヒントと洞察を提供します。  ...
    • 12 Jun 2023
  • DEI@Cadence: My Volunteering Experience with WiTU Uganda: Challenges and Positive Outcomes

    Life at Cadence: DEI@Cadence: My Volunteering Experience with WiTU Uganda: Challenges and Positive Outcomes

    Nick Heaton
    Nick Heaton
    Volunteering in Uganda and Overcoming Obstacles
    • 12 Jun 2023
  • Sigrity and Systems Analysis 2023.1リリース!

    PCB解析/ICパッケージ解析: Sigrity and Systems Analysis 2023.1リリース!

    SPB Japan
    SPB Japan
    Sigrity & Systems Analysis (SIGRITY/SYSANLS) 2023.1リリースが Cadence Downloadsサイトからダウンロード可能となりました。2023.1リリースで改修された項目は、インストールフォルダに含まれているREADME.txtをご参照ください。 SIGRITY/SYSANLS 2023.1 ここにSIGRITY/SYSANLS 2023.1リリースの主要なアップデート内容をいくつかリストしました。注意: このリリースに...
    • 8 Jun 2023
  • EdgeQ: Building the World's First 5G Basestation on a Chip

    Corporate News: EdgeQ: Building the World's First 5G Basestation on a Chip

    Tanushri Shah
    Tanushri Shah
    EdgeQ’s vision is to create big connections with a small chip. They’re looking to democratize 5G in an open paradigm, where their customers can access, customize, and deploy 5G purely through software. Their current mission is to accelera...
    • 8 Jun 2023
  • Virtuoso Studio: The Evolution of Analog Design

    Analog/Custom Design: Virtuoso Studio: The Evolution of Analog Design

    Dimitra Papazoglou
    Dimitra Papazoglou
    In this first blog of Virtuoso Studio blog series, Steven Lewis (Product Management Director, Analog/Custom Marketing, Cadence) introduces Cadence’s new AI-powered custom design solution. Virtuoso Studio leverages our 30 years of industry knowledge and leadership providing innovative features, reimagined infrastructure for unrivalled productivity, and new levels of integration that stretch beyond classic design boundaries…
    • 8 Jun 2023
  • Early, Accurate, and Faster Exploration and Debug of Worst-Case Design Failures with ML-Based Spectre FMC Analysis

    Analog/Custom Design: Early, Accurate, and Faster Exploration and Debug of Worst-Case Design Failures with ML-Based Spectre FMC Analysis

    Vinod Khera
    Vinod Khera
    Process nodes with smaller geometries have always enticed chip manufacturers and OEMs, as it helps integrate more functionality over SoC. However, using smaller transistors increases complexity and poses many challenges for IC design engineers. At ad...
    • 8 Jun 2023
  • Multi-Disciplinary Optimization of a Radial Compressor using Cadence CFD and Concepts NREC

    Computational Fluid Dynamics: Multi-Disciplinary Optimization of a Radial Compressor using Cadence CFD and Concepts NREC

    Veena Parthan
    Veena Parthan
    In this short case study, the optimization of a shrouded radial compressor considering both the aerodynamic stage performance and the structural integrity of the impeller, i.e., to maximize isentropic efficiency and reduce von Mises stress, is performed using Cadence Fidelity Turbomachinery suite and Concepts NREC.
    • 7 Jun 2023
  • PowerTree-Based PDN Analysis, Correlation, and Signoff for MR/AR Systems

    System, PCB, & Package Design : PowerTree-Based PDN Analysis, Correlation, and Signoff for MR/AR Systems

    Tanushri Shah
    Tanushri Shah

    At this year’s DesignCon, Meta held a session on ‘PowerTree-Based PDN Analysis, Correlation, and Signoff for MR/AR Systems.’ Presented by Kundan Chand and Grace Yu from Meta, they talked about power integrity (PI) analysis using Sigrity Aurora and Power Integrity tools such as PowerDC and OptimizePI.

    A slide from Meta's presentation with the heading 'What is PowerTree file?'

    The presentation covers some of the PDN design challenges in MR/VR systems, for example, the compact…

    • 5 Jun 2023
  • Ringing the Bell for 35 Years of Innovation

    Corporate News: Ringing the Bell for 35 Years of Innovation

    KT Moore
    KT Moore
    On June 1, Cadence president and CEO Anirudh Devgan rang the Nasdaq Stock Market opening bell in New York City to celebrate our 35th anniversary and our many accomplishments. Here are a few thoughts from KT Moore, vice president of Corporate Marketin...
    • 5 Jun 2023
  • CadenceLIVE Silicon Valley 2023 Cloud Sessions Are Now Available on Demand

    Cloud: CadenceLIVE Silicon Valley 2023 Cloud Sessions Are Now Available on Demand

    Tanushri Shah
    Tanushri Shah
    CadenceLIVE 2023 Silicon Valley was held from April 19-20 at the Santa Clara Convention Center. We had a full Cloud track this year with six presentations delivered by Cadence experts, partners, and customers. If you missed the chance to catch them l...
    • 5 Jun 2023
  • Substrate Noise Coupling in Integrated Circuits

    Analog/Custom Design: Substrate Noise Coupling in Integrated Circuits

    Mark Williams
    Mark Williams

    Silicon integrated circuits utilize various forms of isolation to electrically isolate devices, such as reverse-biased PN junctions or trench isolation. With the exception of exotic materials such as silicon-on-sapphire, they all utilize a silicon substrate which is a potential path for noise coupling. Such coupling can decrease performance or even cause functional failures. So designers need to use various techniques…

    • 3 Jun 2023
  • DEI@Cadence: Speaker Event for Advancing AAPI Professional Success

    Life at Cadence: DEI@Cadence: Speaker Event for Advancing AAPI Professional Success

    Claire Ying
    Claire Ying
    Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you’ll find a community where employees share their perspectives and experiences. By prov...
    • 2 Jun 2023
  • DEI@Cadence: Why I Am an LGBTQ+ Ally, and I Think You Should Be, Too

    Life at Cadence: DEI@Cadence: Why I Am an LGBTQ+ Ally, and I Think You Should Be, Too

    Corporate
    Corporate
    Written by Richard Cotterill, sr. creative designer, Cadence. Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you’ll find a community whe...
    • 2 Jun 2023
  • Exploring World of Flash Memory:  Serial, Dual, Quad, and Octal Interface

    Verification: Exploring World of Flash Memory: Serial, Dual, Quad, and Octal Interface

    Manoj Kachadiya
    Manoj Kachadiya
    Overview

    In the world of digital data storage, flash memory has become an indispensable technology. Flash memory devices are non-volatile storage solutions that can retain data even without power. They are widely used in various applications, including smartphones, digital cameras, USB drives, and solid-state drives (SSDs). In this blog post, we will delve into the basics of serial, dual, and octal flash memory devices…

    • 1 Jun 2023
  • SEMINATEC 2023 – Educating on Micro and Nano Technology

    Corporate News: SEMINATEC 2023 – Educating on Micro and Nano Technology

    Marcelo Silva
    Marcelo Silva
    Cadence was a proud sponsor of the SEMINATEC 2023 conference, held at the University of Campinas in Brazil from March 29-31, 2023. This conference brings together industry representatives, academia, research and development centers, government organi...
    • 1 Jun 2023
  • Is Cadence 35 or 40 – Age Is Just a Number

    Corporate News: Is Cadence 35 or 40 – Age Is Just a Number

    Steve Brown
    Steve Brown
    It’s been 40 years since Jim Solomon, Richard Newton and Alberto Sangiovanni-Vincentelli co-founded SDA Systems, a physical IC design tools company that became Cadence. Most want to measure this year as the 35th birthday of Cadence, marked by ...
    • 1 Jun 2023
  • Boost Your CFD Workflow Productivity with Fidelity Python API – Part I

    Computational Fluid Dynamics: Boost Your CFD Workflow Productivity with Fidelity Python API – Part I

    Veena Parthan
    Veena Parthan
    If you're in the field of computational fluid dynamics testing or studies, you already know how much time and effort it takes to complete the tasks involved. Hours upon hours are spent on geometry clean-up, meshing, and post-processing. Bringing to you is the Fidelity Python API that will enable the automation of any CFD workflow, boosting the productivity of your design cycle.
    • 31 May 2023
  • DEI@Cadence: Asian American and Pacific Islander (AAPI) Heritage Month Spotlights

    Life at Cadence: DEI@Cadence: Asian American and Pacific Islander (AAPI) Heritage Month Spotlights

    Claire Ying
    Claire Ying
    Written by Tomomi Glover, sr. group director and associate general counsel; Lawrence Loh, sr. customer engagement group director; and Claire Ying, Software Engineering group director and AAPI Inclusion Group lead, Cadence. Diversity, equity, and inc...
    • 31 May 2023
<>
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information