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RF Engineering: μWaveRiders: Setting Up a Successful AWR Design Environment Design - UI and Simulation

TeamAWR

When starting a new design, it's important to take the time to consider design recommendations that prevent problems that can arise later in the design cycle. This two-part compilation of guidelines for starting a new design is the result of years of Cadence AWR Design Environment platform Support experience with designs. Pre-design decisions for user interface, simulation, layout, and library configuration lay the groundwork…
- 24 Aug 2022
System, PCB, & Package Design : BoardSurfers: Managing Silkscreen Data Using Allegro 3D Canvas

anandd

The silkscreen layer plays a crucial role in the assembly, repair, and testing of a PCB. You can add a variety of information to this layer, such as the location of the components, polarity, component orientation, on-off switches, LEDs, and testpoint...
- 24 Aug 2022
Breakfast Bytes: CadenceLIVE: Characterizing Libraries with Liberate and CloudBurst

Paul McLellan

At the recent CadenceLIVE Silicon Valley, Scott Chang, the CEO of M31 Technologies, and Cadence's Philippe Hurat presented 5X Faster Library Characterization in the Cloud. When you think of tasks in the design process that are ideally suited to ...
- 24 Aug 2022
Analog/Custom Design: Virtuoso ICADVM20.1 ISR27 and IC6.1.8 ISR27 Now Available

Virtuoso Release Team

The ICADVM20.1 ISR27 and IC6.1.8 ISR27 production releases are now available for download.
- 24 Aug 2022
System, PCB, & Package Design : Sigrity and Systems Analysis 2022.1 HF2 Release Now Available

SigrityReleaseTeam

The Sigrity and Systems Analysis (SIGRITY/SYSANLS) 2022.1 HF2 release is now available for download at Cadence Downloads. For the list of CCRs fixed in the 2022.1 HF2 release, see the README.txt file in the installation hierarchy.
- 23 Aug 2022
Breakfast Bytes: What Does Cadence Do?

Paul McLellan

I was recently on a Zoom call about search engine optimization where we discussed all the new ways we are getting our name onto the search results of our target audience. The SEO expert on the call Googled "what does cadence do?" and pointe...
- 23 Aug 2022
Digital Design: What's Behind the 5% Die-Area Shrink and 12% Power Saving by MediaTek?

Vinod Khera

Leveraging Cadence Cerberus AI-Enabled Chip Optimization Solution MediaTek Achieves Transformative PPA and Improved Productivity

The semiconductor industry is in the midst of a global renaissance. With the advent of technologies like 5G, autonomous driving, hyperscale compute, and the Internet of things, there has been an explosion in demand for electronics. Consumers want chips that must have more functionality, more…
- 22 Aug 2022
Computational Fluid Dynamics: Current Open Positions on the Fidelity CFD Team

John Chawner

Questions I get asked a lot include "Are you nuts?" and "What exactly do you do all day anyway besides surf the interwebs?" A third is "Are you hiring for the Fidelity CFD team at Cadence?" Search the Careers Webpa...
- 22 Aug 2022
Cloud: Four Reasons “Cloud-First” Engineering Makes Companies More Competitive

Corporate

We’re finally at the point where companies can adopt a “cloud-first” approach for design and analysis solutions that can be accessed anywhere from any device. What’s required for a “cloud-first” approach?
- 22 Aug 2022
Breakfast Bytes: CadenceLIVE: Using Helium at NVIDIA

Paul McLellan

We announced Helium in September last year, and I wrote about the product in my post Announcing Helium, Hybrid and Virtual Platforms with Multiple Gears. Helium's full name is Helium Virtual and Hybrid Studio. Helium allows for debugging sof...
- 22 Aug 2022
Computational Fluid Dynamics: High-Order Meshing on 5 Different Geometries Using Fidelity Pointwise

Veena Parthan

For the given 5 geometry configurations, with Fidelity Pointwise high-order meshing, linear meshes are curved and require fewer elements to accurately represent curved geometry and capture complex flow features.
- 21 Aug 2022
System, PCB, & Package Design : Clarity Encrypted Connectors!

Sherry Hess

Cadence Clarity 3D Solver supports encrypted component models! Using this functionality, vendors can supply their 3D components, such as connectors, to end customers without revealing the physical IP of these designs. The first connector vendor to take advantage of this functionality is Japan Aviation Electronics (JAE),
- 21 Aug 2022
Breakfast Bytes: Sunday Brunch Video for 21st August 2022

Paul McLellan

https://youtu.be/YWpcaIEkw7M Made at Lake Tahoe (camera Carey) Monday: 75 Years of Indian Independence Tuesday: PK: A Museum for the Biggest Telecommunication Hub in the World Wednesday: UCIe PHY and Controller—To Die For Thursday: Whatever Hap...
- 21 Aug 2022
System, PCB, & Package Design : BoardSurfers: Training Insights: User Interface Enhancements for Allegro Layout Editors

ACat299612

If you have seen any images or demonstrations of the 17.4-2019 release, the GUI may look ...
- 19 Aug 2022
Spotlight Taiwan: 2022 CadenceLIVE Taiwan 9月1日實體回歸隆重登場

candyyu

半導體產業是電子資訊產業的火車頭，與全球經濟高度連動，面臨全球景氣可能趨緩，半導體產業也將面臨成長的挑戰。EDA為研判半導體景氣的風向球，如何逆風引領全球經濟重啟，未來動向與展望備受矚目! 一年一度半導體與EDA年度盛事 - CadenceLIVE Taiwan 台灣使用者大會即將登場，於9/1(四)於新竹喜來登飯店舉行，並以實體方式隆重回歸。CadenceLIVE Taiwan今年聚焦『Intelligence. Designed.』，匯聚各領域菁英、半導體科技研發人員、電子設計社...
- 19 Aug 2022
Life at Cadence: Collaborating to Enable Data Centers, Automotive, Consumer, and AI/ML Technologies

fschirrmeister

It takes the proverbial village to build complex chips and systems these days. Imagination and Cadence are critical parts of the ecosystem that build many of the technologies that make our life as consumers more productive, comfortable, and safe. In ...
- 18 Aug 2022
Breakfast Bytes: Whatever Happened to 450mm Wafers?

Paul McLellan

When I started at VLSI Technology in the early 1980s, our fab used 5" wafers (150mm, also called 6" sometimes). At some point, VLSI converted to 8" (200mm) wafers. This is not easy to do without taking the fab down completely since you...
- 18 Aug 2022
Computational Fluid Dynamics: Experience the CFD Velocity Contours With Virtual Reality

Veena Parthan

Virtual reality in CFD, especially for post-processing the simulation results, can help users interact with the model to study the physics and find ways to improvise the design.
- 18 Aug 2022
カスタムIC／ミックスシグナル: Spectre Tech Tips: Spectre X EMIR Voltus-XFiの紹介

Custom IC Japan

Spectre® 21.1 ISR8とVirtuoso® IC6.1.8 ISR26（またはICADVM 20.1 ISR26）の組み合わせから、新しいプロダクトVoltusTM-XFi Custom Power Integrity Solutionが導入されました。このプロダクトは、抽出（QuantusTMを使用した）、シミュレーション（ADEとSpectreを使用した）およびデバッグ環境が統一されたコックピットを提供するトランジスタ・レベルのエレクトロマイグレーションとIRド...
- 17 Aug 2022
Breakfast Bytes: UCIe PHY and Controller—To Die For

Paul McLellan

UCIe is the Universal Chiplet Interconnect Express, a type of die-to-die (d2d) serial interconnect. This was announced in March, earlier this year, and I wrote about it at the time in my post Universal Chiplet Interconnect Express (UCIe). I happened ...
- 17 Aug 2022
Academic Network: Cadence Contributes to China Postgraduate IC Innovation Competition

Tracy Zhu

Students are full of wisdom, energy and courage to pursue their dreams. China Postgraduate IC Innovation Competition is one of the series of the Postgraduate Innovation and Practice Competition; it is a team-based, creative, practice, activity...
- 16 Aug 2022
Breakfast Bytes: PK: A Museum for the Biggest Telecommunication Hub in the World

Paul McLellan

In 1920, the little building below was the biggest telecommunication hub in the world. It was the telegraph, rather than the telephone, but 14 cables that circled the globe terminated here at Porthcurno, in Cornwall at the end of that long ...
- 16 Aug 2022
Analog/Custom Design: Virtuoso Meets Maxwell: Completing the Virtuoso RF Solution Assisted Flow

kgjudd

In my last blog, Getting Your Existing SiP File Into Virtuoso RF, I talked about the new enhancements in ICADVM20.1 ISR25 for Virtuoso RF Solution. At the end of the blog, I told you about the Fully Assisted Roundtrip flow, which includes importing SiP files that are compatible with the Virtuoso RF Solution assisted import flow into the Virtuoso platform. Let's examine how the Fully Assisted Roundtrip flow works in this…
- 16 Aug 2022
Computational Fluid Dynamics: 10 Steps from CAD to CFD Using Fidelity Pointwise

Veena Parthan

The 10 steps mentioned in this article can ease the preprocessing step (primarily importing CAD files and meshing) for a CFD solution using the Fidelity Pointwise meshing tool.
- 15 Aug 2022
Verification: Achieve 80% Less Late-Stage RTL Changes and Early RTL Bug Detection

Vinod Khera

It has become challenging to ensure that the designs are complete, correct, and adhere to necessary coding rules before handing them off for RTL verification and implementation. RTL Designer Signoff Solution from Cadence helps the user identify RTL bugs at a very early development stage, saving a lot of effort and cost for the design and verification team. Our reputed customers have confirmed that using RTL signoff for…
- 15 Aug 2022

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