• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Community Forums
  3. Cadence Community
Cadence Community
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • Site
  • Search
  • User
Find Other Members ►
Subscriptions
Get email delivery of the Cadence blog (individual posts).
  • Twitter
  • Facebook
  • LinkedIn
  • Google+

Community


Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

  • Digital Design: Mitigating Congestion, CTS, OCV and Other Challenges using Cadence Tools and Support

    Vinod Khera
    Vinod Khera
    With the shrinking gemoetries and data-intensive endeavours of the upcoming industries like IoT, Robotics, Self-Driving Cars, 5G and 6G phones, designs are getting more complex. There are many challenges like congestion, routing, on-chip variations, and unconstrained paths that must be addressed. Cadence 24X7 support and rapid adoption kits (RAKs) helps customers by providing ready support and quick resolution.
    • 25 Mar 2022
  • Breakfast Bytes: DVCon: UVM Birds of a Feather

    Paul McLellan
    Paul McLellan
    At the recent DVCon 2022, there was a UVM Birds of a Feather meeting. UVM stands for the Universal Verification Methodology. The meeting was free to anyone at DVCon, even with just an exhibit pass. It was led by Mark Strickland who is chair...
    • 24 Mar 2022
  • System, PCB, & Package Design : BoardSurfers: Specifying Layer Information for Multi-Layer Rigid and Flex Stackups

    Sanjiv Bhatia
    Sanjiv Bhatia
    To manufacture a product that performs as you intended, it is imperative that you share accurate stackup definitions with the board fabricator or manufacturer. An accurate stackup definition is critical to getting the best possible performance from ...
    • 24 Mar 2022
  • System, PCB, & Package Design : System Analysis Knowledge Bytes: The Road Ahead for Sigrity - An Interview with Brad Griffin

    deeptik
    deeptik
    In this blog, Brad Griffin (Product Management Group Director for Sigrity Marketing) talks about our product innovations, specifically Sigrity X, and shares his views about the future of system analysis.
    • 24 Mar 2022
  • Breakfast Bytes: 3D Packaging Versus 3D Integration

    Paul McLellan
    Paul McLellan
    A couple of weeks ago it was time for the 18th International Conference and Exhibition on Device Packaging (or IMAPS for short, although those are the initials of the organizer, the International Microelectronics Assembly and Packaging Society)....
    • 23 Mar 2022
  • Toyota Drastically Reduces Simulation Time with Automatic CFD Pre-Processing

    Computational Fluid Dynamics: Toyota Drastically Reduces Simulation Time with Automatic CFD Pre-Processing

    AnneMarie CFD
    AnneMarie CFD
    Creating a detailed CFD model for automotive applications normally requires a huge amount of manual work. Toyota eliminates this work thanks to an innovative CFD pre-processing workflow, and in this on-demand webinar they will show you how. Watch how this allows them to quickly generate models, ready-to-run, with almost no human intervention, drastically reducing simulation turn-around time.
    • 22 Mar 2022
  • Breakfast Bytes: DesignCon is Back In-Person and Cadence Will Be there

    Paul McLellan
    Paul McLellan
    DesignCon is coming up April 5th to 7th. It takes place in the Santa Clara Convention Center. We will be there with a real booth, number 927. DesignCon is a somewhat confusing name for the conference. In the past, I've said it should be called the si...
    • 22 Mar 2022
  • RF /マイクロ波設計: μWaveRiders:AWRソフトウェアを使用したRFカスケード性能の分析と最適化

    RF Design Japan
    RF Design Japan
    RF設計者にとっての重要な課題は、ノイズと歪みの性能のためにRF系を最適化することです。 RF系のノイズと歪みを決定することは、カスケード分析として知られています。 Visual System Simulator(VSS)には、カスケード分析を支援する多くの測定があります。
    • 21 Mar 2022
  • RF Engineering: μWaveRiders: Using AWR Software to Analyze and Optimize RF Cascade Performance

    TeamAWR
    TeamAWR
    A significant challenge for RF designers is the optimization of an RF chain for noise and distortion performance. Determining the noise and distortion as a progression through the RF chain is known as cascade analysis. Visual System Simulator (VSS) has many measurements that assist in cascade analysis.
    • 21 Mar 2022
  • Analog/Custom Design: Virtuoso Meets Maxwell: Custom Passive Devices in RF Circuits - Devices or Interconnects?

    Claudia Roesch
    Claudia Roesch
    Virtuoso Electromagnetic Solver integration allows layered parasitic extraction and electromagnetic simulation with Cadence Quantus Extraction Solution and Cadence EMX Planar 3D Solver. The seamless integration automatically ensures that parasitic effects are neither missed nor double-counted during post-layout circuit simulation. But what am I doing with custom passive devices? How can I include the parasitics of the…
    • 21 Mar 2022
  • Cadence Runs on AMD Processors, and AMD Uses Cadence to Design Those Processors

    Breakfast Bytes: Cadence Runs on AMD Processors, and AMD Uses Cadence to Design Those Processors

    Paul McLellan
    Paul McLellan
    AMD EPYC 7003 designed with Cadence tools, and Cadence tools run on the new chip. With video.
    • 21 Mar 2022
  • Breakfast Bytes: Sunday Brunch Video for 20th March 2022

    Paul McLellan
    Paul McLellan
    https://youtu.be/C5tRh3gdAeo Made on my balcony (camera Carey) Monday: DVCon: PSS in the Real World Tuesday: Matter Wednesday: Industry 4.0 Thursday: Offtopic: Update Friday: Cadence recharge day Featured Post: 2021 Women in Technology Scholarsh...
    • 20 Mar 2022
  • Life at Cadence: Celebrating Women around the World

    Claire Ying
    Claire Ying
    “Drive Your Own Development” Workshop in APAC The women in our Cadence SVG teams in Mainland China and Taiwan were thrilled to participate in a full-day career development workshop titled “Drive Your Own Development,” at the...
    • 17 Mar 2022
  • Breakfast Bytes: Offtopic: Update

    Paul McLellan
    Paul McLellan
    If you read Breakfast Bytes regularly, you will have noticed that I do a monthly "update" post, usually on the last Friday of the month, grouping together updates to existing posts and stories that are too small to justify writing a full bl...
    • 17 Mar 2022
  • Verification: Addressing Hyperscalers' Requirements with Ethernet 800G

    Krunal Patel
    Krunal Patel

    Cloud computing, IoT (Internet of Things), machine learning, big data, and data centers are a few of those buzzwords levitating around digital transformation in recent years and we are quite familiar with these terms. These technologies have much of a demand for things like excessive speed, higher bandwidth, scalability, and accelerated processing power.  

    Hyperscale computing provides an intelligible method of processing…

    • 17 Mar 2022
  • Breakfast Bytes: Industry 4.0

    Paul McLellan
    Paul McLellan
    Today we are at the dawn of the fourth industrial revolution, or Industry 4.0 as it is sometimes called. Let's start by looking back to the first three. It is well known that Henry Ford created the original assembly line. However, in some ways, i...
    • 16 Mar 2022
  • Meet Our Experts At The Seawork Commercial Marine Conference

    Computational Fluid Dynamics: Meet Our Experts At The Seawork Commercial Marine Conference

    AnneMarie CFD
    AnneMarie CFD
    Explore the challenges, changes and emerging opportunities in today’s and tomorrow’s commercial marine and workboat sector at Seawork in Southampton, UK - in person or online. Cadence will be there and is looking forward to meeting you. To learn more about Computational Fluid Dynamics software that functions as a virtual towing tank, make sure to pass by our booth or schedule a meeting with one of our experts (link provided…
    • 16 Mar 2022
  • カスタムIC/ミックスシグナル: Virtuoso Meets Maxwell: Virtuoso RF Compliance AuditによるDie Exportの円滑化

    Custom IC Japan
    Custom IC Japan
    'Virtuoso Meets Maxwell' はVirtuoso RF ソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのI...
    • 15 Mar 2022
  • Breakfast Bytes: Matter

    Paul McLellan
    Paul McLellan
    Do you know what Matter is? This is not a deep question about the origins of the universe or something. Perhaps you have heard of Project CHIP. That sounds like something to do with semiconductors, but actually CHIP stands for Connected Home over IP ...
    • 15 Mar 2022
  • Breakfast Bytes: DVCon: PSS in the Real World

    Paul McLellan
    Paul McLellan
    One of the opening presentations at the recent DVCon was an Accelera-sponsored update on the Portable Stimulus and Test Standard (PSS...yes, the acronym doesn't quite match since "test" was added later). The presenters were: Tom Fitzpa...
    • 14 Mar 2022
  • Universal Chiplet Interconnect Express (UCIe)

    Breakfast Bytes: Universal Chiplet Interconnect Express (UCIe)

    Paul McLellan
    Paul McLellan
    Recently, Intel, AMD, Arm, the two leading-edge foundries, Google Cloud, Meta, Qualcomm, and ASE announced that they are forming a new open standard for chiplet interconnect, named Universal Chiplet Interconnect Express, or UCIe. One o...
    • 11 Mar 2022
  • Digital Design: Voltus Voice: Early Power and Thermal Integrity Analysis in 3D-ICs - Why it Really Matters?

    Anshika Gahlaut
    Anshika Gahlaut
    Learn how to navigate through the challenges of power and thermal integrity analysis in 3D-ICs with the CadenceTECHTALK webinar on 23rd March, 2022.
    • 11 Mar 2022
  • Computational Fluid Dynamics: Are Formula 1 Cars Racing like Dolphins in Water?

    Veena Parthan
    Veena Parthan
    Brief summary on porpoising affecting the performance of Formula 1 racing cars and how AI technology can enhance the accuracy of simulation platforms for a faster design solution.
    • 11 Mar 2022
  • Leveraging Vision for Depth Perception in Autonomous Driving

    SoC and IP: Leveraging Vision for Depth Perception in Autonomous Driving

    Vinod Khera
    Vinod Khera
    The automotive industry is inching towards enhancing the driver’s experience and overall safety. We have seen a plethora of technological innovations such as ADAS, tire pressure monitoring, automated emergency braking, IOT etc. that have improved vehicle performance, efficiency, reliability, and safety. Autonomous driving is leading to major disruptions in the automotive industry. Light used Tensilica V7 for depth perception…
    • 10 Mar 2022
  • DVCon Functional Safety

    Breakfast Bytes: DVCon Functional Safety

    Paul McLellan
    Paul McLellan
    At DVCon last week, there was an update on the Accellera Functional Safety Standard that is in development. The working group (WG) is chaired by my Cadence colleague Allessandra Nardi. Also on the presentation were: Vatsa Prahailada, who is Technica...
    • 10 Mar 2022
<>
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information