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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

PCB、IC封装：设计与仿真分析

Ken的博客系列之七 | 千兆位串行链路接口的SI方法

作者：Ken Willis 上一篇：使用IBIS-AMI模型进行仿真 反向信道训练 均衡器自适应的另一项能力是反馈训练。许多高速串行协议规定SerDes接收器可以评估发射器送出的training…

• less than a min read
SI , Chinese blog , ddr5 , 仿真分析 , DDR4 , IBIS-AMI , 中文 , SerDes , Sigrity , SystemSI , 信号完整性 , SI分析与建模

Breakfast Bytes

Programming Languages for Embedded Systems

How do you program an embedded system? Say, the code that runs on the control processor…

• 10 min read
swift , programming , Python , programming languages , rust , Matlab

Academic Network

Xidian University: 2019 Student Summer Training Camp

School of Microelectronics of Xidian University , was set up in 2004 which is one…

• 1 min read
university , Cadence Academic Network , university program

Breakfast Bytes

Celsius: Thermal and Electrical Analysis Together at Last

Today at CDNLive Israel, Anirudh Devgan, Cadence's President, announced the Celsius…

• 3 min read
celsius , CDNLive , system analysis , Thermal Analysis , cdnlive israel , electrical-thermal analysis

Academic Network

Taiwan National IC Design Competition

The Taiwan National IC Design Competition was a great opportunity for Cadence and…

• 1 min read
Taiwan , Cadence Academic Network , academia , EDA

Whiteboard Wednesdays

Whiteboard Wednesdays - Announcing Celsius Thermal Solver: A New Approach to System…

In this week's Whiteboard Wednesdays video, Be Gu introduces Celsius Thermal Solver…

• less than a min read
celsius , Whiteboard Wednesdays , Thermal Analysis , finite element analysis , FEA

System, PCB, & Package Design 

BoardSurfers: PCB Electronics - Defining and Applying Physical and Spacing Const…

If you get frequent calls from your fab houses or your customers regarding your product…

• 6 min read
APD , PCB Editor , Constraint Manager

Digital Design

Upcoming Webinar: AI Accelerator Design with Stratus HLS

There is no doubt that 2019 has seen an explosion of artificial intelligence/machine…

• less than a min read
High-Level Synthesis , webinars , TensorFlow , machine learning , Stratus , SystemC , HLS

Breakfast Bytes

PCIe Gen 4: It's Official, We're Compliant

Way back in April 2016, I wrote a post about Cadence IP for PCI Express (PCIe) Gen4…

• 3 min read
PCIe 4 , PCIe Gen4 , pcie 3

System, PCB, & Package Design 

IC Packagers: Capture Your Design for Review

How do you quickly show another developer an issue that concerns you? Do you need…

• 3 min read
APD , SiP Layout

Academic Network

Academic Network Engaging with National Taiwan University

The National Taiwan University hosted an EDA summer camp for the third consecutive…

• 3 min read
university , Student Day , Taiwan , Cadence Academic Network , academia , university program

Breakfast Bytes

MLPerf: Benchmarking Machine Learning

Most presentations at the recent HOT CHIPS conference are about actual chips, mostly…

• 6 min read

Analog/Custom Design

Virtuosity: Layout Reuse Flow in Modgen

Modgen now supports the Layout Reuse Flow. Read on to see how you can use this feature…

• 4 min read
Modgen On Canvas , ICADVM18.1 , MODGEN , Layout Suite , Layout , Virtuoso , Virtuosity , Layout design , Custom IC Design , modgens , Virtuoso Layout Suite , Custom IC

System, PCB, & Package Design 

DATA Pulse: Track Your Components—Efficient Library and Design Data Management

Ever noticed how some objects always mysteriously disappear? It's like they have…

• 1 min read
lifecycle , RAK , Allegro

Breakfast Bytes

Sunday Brunch Video for 15th September 2019

https://youtu.be/bcAO52jxk10 Made at SFO (camera Carey Guo) Monday: HOT CHIPS: In…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

Ken的博客系列之六 | 千兆位串行链路接口的SI方法

作者：Ken Willis 上一篇：高效的互连提取 使用IBIS-AMI模型进行仿真 此时，SerDes元器件供应商应该已经提供了所需的IBIS-AMI模型…

• less than a min read
PCB , SI , Chinese blog , ddr5 , 仿真分析 , DDR4 , equalization , IBIS-AMI , 中文 , SerDes , Sigrity , SystemSI , 信号完整性

Breakfast Bytes

Intelligent System Design

Yesterday in my post Intelligent Systems , I wrote about how the imperative for differentiated…

• 5 min read
system analysis , pervasive intelligence , design excellence , intelligent system design , system innovation

Breakfast Bytes

Intelligent Systems

Cadence's goal is to empower engineers at semiconductor and systems companies to…

• 4 min read
intelligent system design

Digital Design

Safety and Aging in IoT Devices: What We Know Today

How do we achieve highly accurate aging data models for critical circuits in automotive…

• 1 min read
iot devices , DAC 2019 , aging , GlobalFoundries
CDNS - Fix Layout Hompage