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Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

Always On at D&R

At the recent D&R IP-SoC Day 2022, Amol Borkar presented Designing the Next Ultra…

• 5 min read
always on , vision p1 , Tensilica , aon

PCB、IC封装：设计与仿真分析

如何在PCB设计中进行DDR布线？

DDR布线技术的重要性 在如今的印刷电路板设计中，双数据速率（DDR）存储器非常普遍。许多设计都会用到DDR存储器配置的不同版本，这需要在布局中使用特定的布线模式…

• less than a min read
Chinese blog , 布线 , PCB设计 , 中文 , DDR , Allegro PCB Editor , Allegro

Breakfast Bytes

ESD Alliance CEO Outlook 2022

Last week was the ESD Alliance CEO Outlook. It was hosted by Keysight (fka Agilent…

• 13 min read
keysight , cadence , ceo outlook , Siemens , ARM , D2S , esd alliance

Verification

How AMBA CHI Specification Has Evolved - CHI-E (r)evolutionary?

We covered CHI specification revisions A to D in my previous article , what about…

• 2 min read
Verification IP , Functional Verification , VIP , AMBA , CHI VIP

PCB、IC封装：设计与仿真分析

详解时域瞬态分析技术

本文要点： 所有的物理系统在运行动态中都会表现出一些瞬态行为，电子产品也是如此 瞬态分析技术可以帮助了解不同电气状态之间的转换 当检查测量数据或软件仿真数据时…

• less than a min read
Chinese blog , 时域 , 仿真 , 中文 , 系统分析 , Sigrity , 信号完整性 , 瞬态

The India Circuit

SemiconIndia 2022 Conference: A First-of-Its-Kind

The Ministry of Electronics and Information Technology (MeitY) organized a unique…

• 3 min read
Government of India , digital india , National Policy on Electronics , SemiconIndia 2022

Breakfast Bytes

Gabrièle Saucier on the History of IP

Recently, it was D&R's IP-SoC Silicon Valley 2022. The opening keynote was given…

• 4 min read
IP , ip-soc , d&r , semiconductor IP

Computational Fluid Dynamics

Fidelity CFD Overset Meshes to Simulate Rotor Hub Vortex Shedding in Helicopters

Vortex shedding in a helicopter rotor hub can be analyzed and captured precisely…

• 3 min read
CFD , drag prediction , Meshing Monday , vortex shedding , overset meshing , Pointwise , helicopter , rotor hub , Fidelity CFD , engineering , simulation software , NUMECA , Meshing

Breakfast Bytes

Sunday Brunch Video for 1st May 2022

https://youtu.be/TERyp8U7PCY Made at Parker Ranch, Saratoga (camera Carey) Monday…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

NUMECA、CFD与美洲杯帆船赛

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章" NUMECA, Computational Fluid…

• less than a min read
CFD , Chinese blog , 流体力学 , 计算流体动力学 , 中文 , 系统分析 , NUMECA , 多物理场仿真

Verification

System Verification Scoreboard: Its Role and Partnership with Verification IPs

As discussed in the last installment of the blog, a robust system level scoreboard…

• 1 min read
Verification IP , scoreboard , SoC verification , Hardware Coherency

Breakfast Bytes

April Update: USB-C, Great Place to Work, Intel Fab Tour, DALL-E

It's the last Friday in April already, so time for one of my monthly updates where…

• 4 min read
update , USB-C

Analog/Custom Design

Spectre Tech Tips: Using the Spectre Strobe Feature

From time to time, we observe Spectre customers using the maxstep feature for applications…

• 4 min read
Fast Fourier Transform , ADE Explorer , strobe , Spectre Circuit Simulator , Virtuoso Analog Design Environment , Virtuoso IC6.1.8 , ADE Assembler

Analog/Custom Design

Knowledge Booster Training Bytes — Registrations Open: Enhancing Layout Productivity…

We are going to host a webinar on Virtuoso Layout Pro Training in the upcoming month…

• 4 min read
Cadence Digital Badges , Cadence Floorplanner , Virtuoso Layout Productivity , Module Generator , Cadence Design Planner , Cadence training , training bytes , Cadence Education Services , Custom IC Design

Computational Fluid Dynamics

Introducing Cadence Fidelity CFD Software

On 19 Apr 2022 we announced Fidelity CFD. As you can imagine, it has dominated my…

• 3 min read
CFD , Computational Fluid Dynamics , fluid dynamics , Fidelity CFD , Mesh Generation

Breakfast Bytes

Syntiant Wins MLPerf TinyML Benchmark (with Help from Tensilica HiFi)

Earlier this month, MLCommons announced the latest round of results for inference…

• 4 min read
hifi 5 , mlperf tiny , Tensilica , mlperf

Computational Fluid Dynamics

Computational Fluid Dynamics Helps Marine Life Communicate

CFD simulations can help control noise emitted by cavitation-infected ship propellers…

• 4 min read
CFD , Electrification , cavitation , marine , noise pollution , ship propellers , simulation software , electric boats , marine life , under radiated noises , ecological balance

Breakfast Bytes

Linley: AI Moving to the Edge

Last week was the Linley Spring Processor Conference. One change since last year…

• 6 min read
hopper , deep learning , Linley , neural network , AI

System, PCB, & Package Design 

What's New in Clarity 3D Solver: Advancing In-Design EM Analysis

Increase both performance and capacity for chip, package, and PCB EM analysis with…

• less than a min read
CDNS - Fix Layout Hompage