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Featured

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

Corporate
Corporate 20 Sep 2025 • 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC

Corporate News

Building a Future Beyond Boundaries with Honda and Cadence

We at Cadence are proud to be a long-term partner of Honda R&D (HGRX), and our collaboration…

Corporate
Corporate 17 Sep 2025 • 6 min read
Automotive , featured , physical ai , automotive electronics , AI

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
Reela Samuel 2 Sep 2025 • 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 27 Aug 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement
cdns - all_blogs_categories

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Blog - Post List

Latest blogs

Academic Network

ISVLSI 2016: Advanced-Node Custom Layout Symposium Keynote

I had an exciting week in July here in Pittsburgh, PA with the IEEE Computer Society…

eliasfallon 26 Aug 2016 • 2 min read
ISVLSI , VLSI , Cadence Academic Network , academia , Virtuoso , advanced node layout

Breakfast Bytes

Provisioning Devices Securely

Asaf Ashkenazi of Cryptography Research (now part of Rambus) talked about provisioning…

Paul McLellan 26 Aug 2016 • 3 min read
provisioning , security , cryptography research , IoT , wearables , linley mobile , Internet of Things , Breakfast Bytes

Breakfast Bytes

Who Put the Silicon in Silicon Valley?

I think the person who has the strongest claim to putting the silicon in Silicon…

Paul McLellan 25 Aug 2016 • 5 min read
marc andreessen , William Shockley , Silicon Valley , Breakfast Bytes

Computational Fluid Dynamics

Ford: Multidisciplinary Design Optimization of a Turbocharger Compressor

Ford chooses Fidelity Optimization to increase the performance of turbocharger compressors…

AnneMarie CFD 25 Aug 2016 • 4 min read
CFD , Automotive , automotive engineering , turbomachinery , Computational Fluid Dynamics , fluid dynamics , Fidelity CFD , CFD Applications , Turbo

Breakfast Bytes

What’s for Breakfast? Preview August 29th to September 2nd (video)

https://youtu.be/X-hVSQfbtFE

Paul McLellan 24 Aug 2016 • less than a min read
self-heading , Apple , risc-v , Audi , CDNLive , autonomous driving , MIPI , isa , cdnlive boston , Soundwire , aging , FinFET , ADAS , piloted driving , Krste Asanović , instruction set architecture

Verification

Coverage Maximization

Searching for “automatic coverage maximization” results with ~16 million hits. Alas…

teamspecman 24 Aug 2016 • 4 min read
Specman , coverage , Functional Verification , Testbench simulation , Coverage-Driven Verification , CDV , e , e language , Funcional Verification , team specman , specman elite , verification

Breakfast Bytes

Wearables: Growing at 38% CAGR?

At what has now become the Linley Mobile and Wearables Conference, Linley pointed…

Paul McLellan 24 Aug 2016 • 3 min read
smartwatch , quaqlcomm , Linley , wearables , smart watch , mobile

SoC and IP

MIPI DevCon 2016 – Mobile and Beyond

MIPI DevCon 2016 – Mobile and Beyond The word “beyond” may bring up thoughts of…

Steve Brown 23 Aug 2016 • 6 min read
MIPI Alliance , ADAS

Whiteboard Wednesdays

Whiteboard Wednesdays - Radar Signal Processing Optimized for the Tensilica Fusion…

In this week's Whiteboard Wednesday video, Pushkar Patwardhan discusses the advantages…

References4U 23 Aug 2016 • less than a min read
Whiteboard Wednesdays , IP , radar signal processing , Tensilica

Breakfast Bytes

CDNLive India Keynote

The keynote at CDNLive Bengaluru was given by Michal Siwiński. Since day 1 of CDNLive…

Paul McLellan 23 Aug 2016 • 2 min read
CDNLive India , SDE , system design enablement , Breakfast Bytes

SoC and IP

Less is More With MIPI I3C

There is little doubt that Internet of Things has become the next big thing in business…

Jacek Duda 22 Aug 2016 • 1 min read
peripherals , IoT , MIPI , i2c , sensors , hdr , I3C , sensewire , hub

Breakfast Bytes

SEMICON Best of the West: Coventor

SEMICON West runs a sort of award program called Best of the West. Companies submit…

Paul McLellan 22 Aug 2016 • 3 min read
semicon west , semi , Coventor , semulator3d , best of the west

Breakfast Bytes

Perspec Modeling

The post A Perspective on Perspec earlier this week introduced the idea of Perspec…

Paul McLellan 19 Aug 2016 • 3 min read
Perspec , perspec system verifier , UML , system verilog

Analog/Custom Design

High-Sigma Showdown: Which Method is Better?

The adoption and usage of advanced node technology (16nm and below) has been extraordinary…

TeamADE 18 Aug 2016 • 3 min read
variation tsmc hsmc sss sampling high sigma

Breakfast Bytes

What's for Breakfast? August 22nd

http://youtu.be/ZkZQAW6Gl7M Monday: At SEMICON West the winner of the "Best of…

Paul McLellan 18 Aug 2016 • less than a min read
provisioning , security , Intel , CDNLive India , linley group , shockley , wearables , Qualcomm , Fairchild , a16z , cdnlive bengaluru , Coventor , mobile , Silicon Valley

Breakfast Bytes

Palladium and Protium Platforms, the Hardware Twins

The Palladium Z1 is an enterprise-level emulation system. If you don't already know…

Paul McLellan 18 Aug 2016 • 4 min read
palladium z1 , Protium , Palladium , Emulation , FPGA prototyping

Breakfast Bytes

Omnia Simulation in Tres Partes Divisa Est

"Omnia Gallia in tres partes divisa est" were the opening words to Julius Caesar…

Paul McLellan 17 Aug 2016 • 3 min read
verilog-xl , Verilog , rocketick , rocketsim , simulation

Whiteboard Wednesdays

Whiteboard Wednesdays - Tensilica Fusion G3 DSP Features and Benefits

In this week's Whiteboard Wednesdays video, Paul Garden provides more details on…

References4U 16 Aug 2016 • less than a min read
Whiteboard Wednesdays , IP , Tensilica , Tensilica Fusion G3

Verification

10 New Protocols to Design and Integrate Your SoC in Record Time

This month we released 10 new Verification IP for leading-edge protocols! Did I say…

annkeffer 16 Aug 2016 • 1 min read
SPI NAND , Verification IP , VIP , MIPI , DisplayPort , USB , DSI , octal spi , Ethernet , Tensilica , design , Type-C , and Verification IP , USB UFS
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