Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Breakfast Bytes

The Future of Neural Networks...and Our Robot Overlords

Chris Rowen, the CTO of the Cadence IP group, wrapped up the recent seminar in Las…

• 4 min read
open datasets , training , neural networks , data scientist , privacy , CNN , Breakfast Bytes

Academic Network

Meet the Winners of Tensilica Xtensa Embedded DSP Design Contest India 2016

The winners of the Tensilica Xtensa Embedded DSP Design Contest have been announced…

• 1 min read
Cadence Academic Network , Bangladesh , Tensilica , Xtensa Design Contest , India

Breakfast Bytes

Hierarchical Neural Networks

The German Traffic Sign Benchmark actually has the signs divided into groups: speed…

• 3 min read
neural networks , CNN , hierarchical neural networks

Verification

Fine Tuning of Coverage Model Definition

Functional Coverage is one of the main means to measure the quality and progress…

• 8 min read
funtional verification , Specman , coverage , Functional Verification , Coverage-Driven Verification , CDV , e , e language , Funcional Verification , team specman , Verification IP modeling , metric-driven verification , MDV

Academic Network

Cadence Academic Network in Poland

Poland is a country with long tradition in microelectronics education and research…

• 2 min read
university , Cadence Academic Network , Poland , university program

Academic Network

PRIME and SMACD Conferences in Lisbon

Cadence Academic Network is supporting for years PRIME (PhD Research in Microelectronics…

• 2 min read
Cadence Academic Network , academic workshop , ADE , Virtuoso

Breakfast Bytes

How to Optimize Your CNN

Convolutional neural nets (CNNs) are not programmed in the traditional sense, but…

• 4 min read
Low Power , cnn training , cnn optimization , neural networks , CNN , embedded neural nets

Academic Network

Students from Pohang University of Science and Technology Visit Cadence Headquar…

My team recently had the privilege of hosting first year undergraduate students aka…

• 1 min read
Cadence Academic Network

Academic Network

DAC: A Glimpse of the Future Innovators

Hope you read my previous blog on Cadence Academic Network sponsoring all the student…

• 1 min read
DAC , Cadence Academic Network

Whiteboard Wednesdays

Whiteboard Wednesdays - Gauging Signal Quality Using Eye Diagrams

In this week's Whiteboard Wednesdays video, Chung Huang summarizes his presentation…

• less than a min read
Whiteboard Wednesdays , eye diagrams , signal quality

Breakfast Bytes

Power-Efficient Recognition Systems for Embedded Applications

Neural networks are hot. Las Vegas is hot, too. And there is a connection. In late…

• 4 min read
Chris Rowen , training , neural networks , CNN , embedded

Breakfast Bytes

Last Chance to See Tsukiji Fish Market

This doesn’t have much to do with Cadence or semiconductors. It has a lot to do with…

• 5 min read
tsukiji , renasas , japan , tsukiji fish market

SoC and IP

How to Create a Working IoT Sensor in One Month

Cadence and ARM have created an IoT IP reference sub-system that can speed system…

• less than a min read
sensor , IoT , ARM , IoT subsystem , IoT sensor

Whiteboard Wednesdays

Whiteboard Wednesdays—Optimizing Neural Networks

In this week's Whiteboard Wednesdays video, Chris Rowen discusses optimizing neural…

• less than a min read
Whiteboard Wednesdays , IP , Chris Rowen , high throughput , low energy , Tensilica , neural networks

System, PCB, & Package Design 

Cadence Sigrity SystemSI Technology Highlighted at CDNLive SV 2016

This year’s CDNLive Silicon Valley developer conference had more than 125 presentations…

• 1 min read
PCB SI , PCB , SI , PCB Signal and power integrity , Signal Integrity , PCB design , Sigrity

Breakfast Bytes

Pieter Vorenkamp and IP at Cadence

Pieter Vorenkamp is the new(ish) senior VP and general manager of the semiconductor…

• 2 min read
IP , Pieter Vorenkamp , Breakfast Bytes

Breakfast Bytes

An Steegen's Secrets of Semiconductor Scaling

If you were asked where in the world the most leading-edge semiconductor research…

• 3 min read
scaling , an steegen , imec , FinFET , ITC , power , Breakfast Bytes , silicon nanowire

Breakfast Bytes

Designing for the Cloud

At the recent GSA silicon summit, there was a panel session on designing for the…

• 4 min read
cloud , accelerator , gsa silicon summit , gsa , datacenter

Whiteboard Wednesdays

Whiteboard Wednesdays—Ubiquitous USB Interface Evolution

In this week's Whiteboard Wednesdays video, Arif Kahn details the evolution of the…

• less than a min read
Whiteboard Wednesdays , IP , USB Type-C , USB , Arif Kahn
CDNS - Fix Layout Hompage