Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

The Old Order Changeth: Samsung Takes the Crown

The most famous line of Tennyson's poem Morte D'Arthur is "The old order passeth…

• 6 min read
Intel , Memory , flash , Samsung , mobile

Analog/Custom Design

Virtuosity: Sharing Custom SKILL Calculator Functions

Have you ever written a fantastic piece of SKILL to carry out a calculation and wanted…

• 3 min read
Analog Design Environment , ADE Explorer , Virtuoso , ViVA , Custom IC Design , SKILL , ADE Assembler

Breakfast Bytes

DesignCon: PCB and Packaging Take Center Stage

You wouldn't really know it from the name, but DesignCon is all about the design…

• 8 min read
si/pi , EMI , DesignCon , deep learning , Power Integrity , machine learning , Signal Integrity , dnn , CNN , neural network

Verification

New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions

The recent update of the AMBA® 5 ACE/AXI specification introduces a number of significant…

• 2 min read
amba5 , ACE5 , AXI5 , AMBA

Breakfast Bytes

DesignCon: SI, PI and EMI Have a Threesome

DesignCon 2018 opened with a keynote panel on the subject of SI, PI, and EMI Challenges…

• 8 min read
DesignCon , Power Integrity , Signal Integrity , electromagnetic interference

SoC and IP

You Won't Believe Your Ears When Listening to Your Laptop

I wouldn't believe it if I hadn't heard it myself on a laptop in the Cadence booth…

• 2 min read
CES , audio , HiFi , Tensilica

Breakfast Bytes

Open-Source IP in Government Electronics

At the RISC-V conference late last year, one of the keynotes was by Linton Salmon…

• 6 min read
risc-v , dod , darpa

Whiteboard Wednesdays

Whiteboard Wednesdays - LPDDR4X DRAM: Performance and Power Efficiency Improvements…

In this week's Whiteboard Wednesdays video, Kishore Kasamsetty will help you learn…

• less than a min read
Whiteboard Wednesdays , LPDDR4

Breakfast Bytes

All Models Are Wrong; Some Are Useful

"All models are wrong, some are useful.” This remark is attributed to the statistician…

• 9 min read
climate , model , digital , SPICE

Verification

JEDEC UFS 3.0 Now Available in Cadence VIP Portfolio – For Mobile and Automotive…

The JEDEC UFS (Universal Flash Storage) started in 2011 with the v1.0 first specification…

• 1 min read
Verification IP , UniPro , MIPI Alliance , JEDEC , automotive electronics , UFS , storage , MPHY

Breakfast Bytes

TSMC 30 Years Ago Today

At IEDM in December, Gary Dagastine is one of the people responsible for press relations…

• 6 min read
Taiwan , fabless , TSMC , chips and technologies , foundry

The India Circuit

The Promise Of Digital India

By 2019, it is estimated that there will be five billion mobile phone users in the…

• 4 min read
Narendra Modi , digital india , National Digital Literacy Mission , Aadhar , Ravi Shanker Prasad

Breakfast Bytes

City Slickers Marketing

Last week I talked about sales in Running a Salesforce . This week it is the turn…

• 4 min read
steve blank , city slickers marketing , marketing

Whiteboard Wednesdays

Whiteboard Wednesdays - Verification Challenges for SoCs Integrating CCIX Interface…

In this week's Whiteboard Wednesdays episode, Nick Heaton, Distinguished Engineer…

• less than a min read
Whiteboard Wednesdays , ccix

Computational Fluid Dynamics

Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil…

Numeca USA customer Morrelli & Melvin has been busy using FINE/Marine for various…

• 3 min read

Computational Fluid Dynamics

Morrelli & Melvin: Making Waves in the Marine Industry with Numeca for Hydrofoil…

Numeca USA customer Morrelli & Melvin has been busy using FINE /Marine for various…

• 4 min read

Breakfast Bytes

Coventor Annual Panel: The Next Five Years

For the last few years at IEDM, Coventor have run an evening panel session looking…

• 8 min read
asml , KLA-Tencor , Lam Research , nova , Coventor , GlobalFoundries , IEDM

Verification

Type MIN / MAX Values in Specman

When defining coverage bins for coverage items, the number and size of bins depend…

• 3 min read
Specman , Specman coverage engine , Specman e

Verification

App Note Spotlight: SystemVerilog Gets a Real Number Modeling Update (SVRNM)

Thanks to Xcelium, there’s a new feature on the block in SystemVerilog. It pertains…

• 1 min read
SystemVerilog , real number modeling , Functional Verification , App Note Spotlight
CDNS - Fix Layout Hompage