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Featured

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
KomalJohar 17 Dec 2025 • 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Corporate News

Cadence Tapes Out UCIe IP Solution at 64G Speeds on TSMC N3P Technology

Delivering the next wave of chiplet innovation, Cadence has successfully taped out…

Corporate
Corporate 17 Dec 2025 • 2 min read
news story , ucie , featured , chiplets , TSMC N3P

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
Cadence Japan 15 Dec 2025 • less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
Corporate 11 Dec 2025 • 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured
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Blog - Post List
Latest blogs

Verification

A Winning Strategy: Ethernet 10Base-T to Ethernet 400G!

Ethernet was developed in the 1970s and has been a viable communications protocol…

annkeffer 3 Oct 2016 • 2 min read
Verification IP , 802.3bs , 25G Ethernet , VIP , Ethernet standards , IEEE 802.3 , Ethernet , future of IP , CHI VIP , Ethernet 400G

Breakfast Bytes

5nm: Do You Take the Red Pill or the Blue Pill?

I wrote recently about the TSMC OIP Symposium where they talked about future devices…

Paul McLellan 3 Oct 2016 • 3 min read
tfet , 60 mV/decade , cnt , subthreshold sloope , carbon nanotube , Breakfast Bytes

Breakfast Bytes

How Can I Get Out of This House Without Going Anywhere Near Your Garage?

Go to any venture capitalist's website and they will have a bragging page with their…

Paul McLellan 30 Sep 2016 • 2 min read
anti-portfolio , ebay , starbucks , bessemer.google , OVP , venture capital

Verification

What is ISO 26262 and Why Should I Care?

ISO 26262 is a functional safety standard applied to the development of electrical…

RChilders 29 Sep 2016 • 3 min read
Automotive , functional safety , cadence , ISO 26262

Breakfast Bytes

Linley Gwennap: Specialization Spurs Processor Innovation

Every year in the fall, the Linley Group runs their processor conference. There are…

Paul McLellan 29 Sep 2016 • 5 min read
security , Intel , linley processor conference , AMD , x86 , IoT , Linley , ADAS , ARM , autonomous vehicles , power , Breakfast Bytes

Breakfast Bytes

What’s for Breakfast? Preview October 3rd to 7th (video)

https://youtu.be/dv54rKmMLRo Monday: Options for 5nm. Silicon can only cut…

Paul McLellan 28 Sep 2016 • less than a min read
60mV/decade , SystemVerilog , DSP , tensilica LX7 , CPF , Cadence videos , TSMC , parsers , Tensilica , training bytes , verific , n10 , 5nm , 10nm , ARM , floating point , VHDL , IEDM

Whiteboard Wednesdays

Whiteboard Wednesdays - Why Is More Floating-Point Computation Required by DSP Applications…

Why is more floating-point computation required by DSP applications? More and more…

References4U 28 Sep 2016 • less than a min read
floating-point , DSP , Whiteboard Wednesdays , IP , communications processing , vision processing , Tensilica , wearables processing , floating point

Breakfast Bytes

Memories Are Made of This: Preview of MemCon

This year's MemCon is on October 11, at the Santa Clara Convention Center. Last year…

Paul McLellan 28 Sep 2016 • 5 min read
vertical flash , Memory , LPDDR4 , MemCon , Micron , flash , NAND flash , Denali Party , DRAM , memcon 2016 , Breakfast Bytes

SoC and IP

3 Things You Didn't Know About MemCon 2016

Memcon is an event like few others, where SoC architects congregate to learn and…

Steve Brown 27 Sep 2016 • 1 min read
DDR4 , LPDDR4 , MemCon , DDR IP

Breakfast Bytes

TSMC: Technology Update

Twice a year TSMC has a big meeting in San Jose. These are the times that there is…

Paul McLellan 27 Sep 2016 • 7 min read
OIP , 3D packagin , HPC28 , CoWoS , IoT , 28nm , 20nm , 40ULP , fabless , TSMC , ULP , process roadmap , 55ULP , 16ff , 16nm , InFO , 16FFC , n7 , FinFET , n10 , 7nm , 10nm , foundry

System, PCB, & Package Design 

Why Move Up to Allegro 17.2-2016? New Enhanced Backdrill Capability (Reason 4 of…

Adventures in Backdrilling For the past 15 years or so, routing high-speed interfaces…

mcatramb91 26 Sep 2016 • 4 min read
backdrill , Allegro 17.2 , PCB design , Allegro PCB Editor , Why Move Up to 17.2

Breakfast Bytes

System Design Enablement with Cadence and TSMC

System-on-chip (SoC) designers are always optimizing what has become known as PPA…

Paul McLellan 26 Sep 2016 • 3 min read
Low Power , bvp.system-ppa , virtual platform , TSMC , Tensilica , power , Breakfast Bytes

Verification

Back in the Saddle Again

Nearly five years ago, I signed off with my last blog post in the Cadence Community…

tomacadence 23 Sep 2016 • 3 min read
pswg , Perspec , System Design and Verification , System simulation and analysis , Accellera , portable stimulus , System Design and Verification , verification

Breakfast Bytes

Mellanox: Using Palladium ICA Mode

At CDNLive Israel, Yaron Netanel of Mellanox talked about his experience with Palladium…

Paul McLellan 23 Sep 2016 • 3 min read
Yaron Netanel , CDNLive , debug , mellanox , Palladium , in-circuit acceleration , ICA , cdnlive israel , Breakfast Bytes

Breakfast Bytes

What’s for Breakfast? Preview September 26th to 30th (video)

https://youtu.be/1le_bd4o01Q Monday: System Design Enablement with Cadence and…

Paul McLellan 22 Sep 2016 • less than a min read
OIP , Memory , MemCon , LPDDR , liinley , SDE , TSMC , antiportfolio , DDR , system design enablement , bessemer ventures , power , microprocessor

Breakfast Bytes

How to Connect Sensors with I3C

A couple of sessions at MIPI DevCon last week were on I3C. This is a new generation…

Paul McLellan 22 Sep 2016 • 6 min read
MIPI , i2c , sensors , mobile , I3C

Analog/Custom Design

Virtuoso Video Diary: SKILL IDE Performance Analysis Tools

As a SKILL code developer, do you spend a major chunk of your time in fine-tuning…

deeptik 21 Sep 2016 • 2 min read
Team SKILL , programming , Virtuoso Video Diary , software development , SKILL IDE , Custom IC Design , SKILL++ , Virtuoso Layout Suite , SKILL

Breakfast Bytes

שלום from CDNLive Israel

Shalom. Today is CDNLive Israel in Tel Aviv. At least getting here from San Francisco…

Paul McLellan 21 Sep 2016 • 5 min read
CDNLive , Lip-Bu Tan , cdnlive israel , perlmutter

Whiteboard Wednesdays

Whiteboard Wednesdays - Evolution of the PCIe Standard

In this week's Whiteboard Wednesdays video, Lana Chan explores the history of PCI…

References4U 20 Sep 2016 • less than a min read
Whiteboard Wednesdays , PCIe , PCI Express
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