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Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
• 1 min read
news story , Verification IP , featured
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Latest blogs

SoC and IP

Crucial SSDs hit $1/Gbyte, with a crucial caveat

The Bright Side of News (BSN, www.bsn.com) Web site reports today that Crucial is…

• less than a min read

Digital Design

Five-Minute Tutorial: Creating a NONDEFAULT Rule

Ah, the NONDEFAULT rule. This is a routing rule that is, well, not the default! It…

• 2 min read
nondefault rule , EDI system , tutorial , encounter , Digital Implementation , nondefault , five minute , five-minute

SoC and IP

Top 10 SSD benefits: Samsung publishes list

Samsung, SSD vendor and the world’s leader in Flash memory, has just published a…

• 1 min read

SoC and IP

Oracle optimizes Unbreakable Linux for SSDs. Improves access times by 137%.

This week at its OpenWorld event held in San Francisco, Oracle announced the Unbreakable…

• 1 min read

System, PCB, & Package Design 

What's Good About Differential Impedance in Allegro Constraint Manager? It's in SPB16

The ability to constrain or report Differential Impedance from within Constraint…

• 2 min read
PCB SI , PCB , SI , RF , SPB16.3 , SiP , Signal Intregrity , Digital SiP design , DRC , PCB Signal and power integrity , Allegro 16.3 , SPB 16.3 , design , PCB design , Allegro PCB Editor , SI analysis and modeling , Differential Pair Support , power

Analog/Custom Design

Things You Didn't Know About Virtuoso: ADE XL -- Where Did My Data Go?

Last week I got to attend a "Social Media Summit" here at Cadence. Jeepers, a "summit…

• 3 min read
Analog Simulation , analog , ADE , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , IC 6.1.4 , Custom IC Design

SoC and IP

Samsung whacks DDR3 SDRAM with 36nm stick, knocks 30% off the cost. Elpida and Micron…

Samsung just announced that it is readying 4Q volume production of 2Gbit DDR3 chips…

• less than a min read

SoC and IP

STEC’s ZeusRAM DRAM-based 3.5-inch SSD has 23 microsecond latency, uses Flash for…

This week at Oracle OpenWorld, STEC introduced a DRAM-based, Flash-backed, 6Gbps…

• less than a min read

SoC and IP

Mars Reconnaissance Orbiter crashes, reboots for fifth time

On September 15, the Mars Reconnaissance Orbiter (MRO) went into “safe mode” for…

• 2 min read

Verification

e Templates and Aspect Oriented Programming

In a recent blog - " e Templates: A Nifty Way To Create Reusable Code ", Corey Goss…

• 2 min read
Specman , EDA , e , team specman , Aspect Oriented Programming , AOP , IES-XL

SoC and IP

Just how close to the end of NAND Flash are we?

One of the surprises that came from the many excellent presentations given at GlobalFoundrries…

• 1 min read

SoC and IP

PhotoFast SSD leverages PCIe x8 to smash past Gbyte/sec SSD transfer-rate barrie…

Want a really fast SSD? You’ll need really fast I/O and PhotoFast’s GM-PowerDrive…

• less than a min read

SoC and IP

Intel IDF 2010: SemiAccurate spots Intel SSD with 25nm Flash, new proto SandForce…

We were told that it’s coming and SemiAccurate snapped a photo of a prototype SSD…

• less than a min read

SoC and IP

Can magic BEANs eventually grow phase-change memory into a commercial reality?

Researchers at Lawrence Berkeley National Laboratory (LBNL) and the University of…

• less than a min read

Digital Design

Encounter Puzzler #2: Finding Registers Beneath a Hierarchy

I hope you enjoyed our first Encounter Puzzler: Where Did My Fences Go? The source…

• 1 min read
dbGet , encounter , Digital Implementation , puzzler , tcl

SoC and IP

Intel Fellow Speaks SSD Truth at IDF: SSDs “may never” compete with HDDs on cost…

TechRadar.com reports that Intel Fellow Knut S. Grimsrud said SSDs “may never” compete…

• less than a min read

SoC and IP

Will SD cards become SSDs for the rest of us?

Last night, I came across this interesting article on the ZDNet site about SD cards…

• 1 min read

SoC and IP

SandForce’s big score: $25M investment round and quad-controller PCIe x4 SSD from…

This is SandForce’s week. First the SSD controller-chip vendor announced $25M worth…

• less than a min read

Verification

The Best C++ Debugger is Not the Best SystemC Debugger

I mentioned in a previous article that I have two girls who are excellent debaters…

• 7 min read
virtual platforms , windows , TLM 2.0 , SystemC , Visual Studio , C++ , debugging
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