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Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

MBhatnagar
• 3 min read
ucie , Design IP , featured , TSMC , die-to-die

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

Corporate
• 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC
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Blog - Post List

Latest blogs

Verification

Ubuntu on ARM is Growing

Based on the title, you probably guessed I'm talking about growing in popularity…

• 6 min read
virtual platform , System Design & Verification , Embedded Linux , QEMU

System, PCB, & Package Design 

Who’s up for Chinese?

Recently, someone asked me " .. . why bother translating OrCAD products to Chinese…

• 1 min read
Capture CIS' , PSPICE , OrCAD , PCB design , PCB Capture , Schematic

SoC and IP

What is a Flash cache?

A Flash cache acts like SRAM memory caches that are designed to speed up DRAM access…

• 3 min read

SoC and IP

Free DAC Tix -- Better hurry ‘cause they’re going fast

Love DAC? Design chips? Looking for a job? Today’s your lucky day. Denali, Atrenta…

• 1 min read

SoC and IP

Numonyx 128-Mbit serial- and parallel-I/O PCM non-volatile memories now available…

Numonyx has announced or reannounced two 128-Mbit non-volatilve memory devices based…

• 2 min read

System, PCB, & Package Design 

What's Good About Simplifying the Use of Third-Party SI Models? It's in SPB16.3!

Today, many users receive SI models that are not in DML format. They are given IBIS…

• 8 min read
PCB SI , SI , HSPICE , Signal Intregrity , IBIS , SigXP UI , PCB Signal and power integrity , SPB 16.3 , IBIS-AMI , PCB design

Verification

UVM Based on OVM 2.1.1: What a Great Idea!

Regular readers know that I have been urging the Accellera VIP TSC to base its Universal…

• 2 min read
uvm , Verification methodology , OVM , Functional Verification' signal integrity , Contributions , Accellera

Verification

When Less Is More, Part 3: Is e code really “infinitely” more compact than SystemVerilog…

Building on the packet generation example of part 1 , and the coverage examples of…

• 3 min read
IEEE 1647 , SystemVerilog , Specman , Object Oriented Programming , Functional Verification , e , OOP , Aspect Oriented Programming , AOP , IES-XL

SoC and IP

Intel’s Atom-based Tunnel Creek SOC with integrated PCIe interface opens new era…

One of the most ignored Intel announcements of recent memory must be Doug Davis’…

• 2 min read

SoC and IP

Network World SSD Smackdown shows Fusionio’s PCIe-based SSD provides highest thr…

Network World has just posted an SSD comparison test written by Logan G. Harbaugh…

• 3 min read

SoC and IP

Firmware as the performance differentiator for SSD controllers

Anandtech has just posted a meaty article about SandForce SSD controllers as used…

• 3 min read

Digital Design

EDP Symposium Uncovers an Inconvenient Truth with a Shot of 3D

Every April the leading edge of the leading edge of semiconductor industry meet…

• 3 min read
DATE , CSV , 3DIC , TSV , Wirebond , Digital Implementation , stacked die , flip chip , PoP

SoC and IP

Comprehensive SSD eval puts four drives to the test

Geoff Gasior at The Tech Report has just published a long and very comprehensive…

• 2 min read

SoC and IP

Micron using ONFI 2.1 and SATA 3.0 to leapfrog Enterprise SSDs over HDD performa…

PCWorld reports that Micron will soon be rolling out Enterprise-class SSDs based…

• 1 min read

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Groups? Look to SPB16.3 and See!

With the Allegro PCB Editor SPB16.3 release, you can now allow groups to have elements…

• 1 min read
PCB design

Verification

Specman-SimVision webinar on April 22 (next week!)

We interrupt Corey's excellent "When Less Is More" series to announce a Specman-SimVision…

• 1 min read
IEEE 1647 , debug , Functional Verification , simvision , e , multi-language , IES-XL

SoC and IP

Eurocom’s D900F Panther Notebook with 6-core Intel i7-980X processor: the shape of…

With all the talk of DRAM growth in 2010, you might wonder what’s driving the consumption…

• 3 min read

SoC and IP

More signs of spring for the 2010 DRAM market

Earlier, we reported on the appearance of several good economic signs springing up…

• 1 min read

Verification

Hate Writing Assertions? No problem: let Automatic Formal Analysis do the work

OR: “Leverage automatic checks extracted from designs without writing a single assertion…

• 4 min read
ABV , Functional Verification , Formal Analysis , formal , Incisive , IEV , IFV
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