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Building a Future Beyond Boundaries with Honda and Cadence

We at Cadence are proud to be a long-term partner of Honda R&D (HGRX), and our collaboration…

Corporate
• 6 min read
Automotive , featured , physical ai , automotive electronics , AI

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network
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Blog - Post List

Latest blogs

Analog/Custom Design

Virtuoso Meets Maxwell: Making the Ports Ready for Simulations in Clarity 3D Sol…

This blog describes the features in Virtuoso Layout EXL and Clarity 3D Solver that…

• 6 min read
Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Electromagnetic analysis , ICADVM20.1 , Clarity 3D Solver , Custom IC Design , Virtuoso Layout Suite EXL

カスタムIC／ミックスシグナル

Start Your Engines: 非常に効率的なミックスシグナル検証エンジニアの7つの習慣

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

• 1 min read
AMS-Designer , mixed-signal methodology , Start Your Engines , Virtuoso , mixed signal , japanese blog , AMS Verification , mixed-signal verification

Academic Network

UCLA Leverages High-level Synthesis to Make Rapid Architecture Trade-offs

The Cadence Academic Network values our deep relationships and collaborations with…

• 1 min read
Cadence Academic Network , Berkeley , Spectre , Academic Partnerships , Stratus , UCLA

Computational Fluid Dynamics

The Evolution of Computational Aerospace and CFD

In the beginning there was the airfoil. Or more specifically, in 1968 it became clear…

• 8 min read
CFD , Aerospace , FLO22 , Pointwise , Computational Fluid Dynamics , fluid dynamics , CFD Applications , NUMECA , Mesh Generation

Computational Fluid Dynamics

Extending Quadcopter Drone Flight Time and Range with OMNIS CFD Simulations

Drones have proven to be an efficient solution for a large range of applications…

• less than a min read
CFD , Computational Fluid Dynamics

定制IC芯片设计

Virtuoso Meets Maxwell: 跨平台流程的模式-- 统一库

目前，将使用不同工艺的元件集成在一起似乎是一件神奇的事情，但是它允许设计人员使用新的工艺，在衬底上将验证过的旧节点设计组合在一起，从而降低了同质片上系统(SOC…

• less than a min read
Technology Independent Layout Pcell , ICADVM18.1 , Unified Library , Virtuoso Layout EXL , Virtuoso System Design Environment , Virtuoso RF Solution , Cadence SiP Layout , TILP , Chinese blogs , VMM

Breakfast Bytes

Update: CadenceLIVE India, Ransomware, 2nm, and More

This is another one of my update posts, following up on topics I covered in earlier…

• 8 min read
security , ransomware , solar storm , ibm 2nm , IBM , Mars , cadencelive india , ARM , 2nm

Breakfast Bytes

Sunday Brunch Video for 16th May 2021

https://youtu.be/_wup2MSTVks Made on Communication Hill, San Jose (camera Carey…

• less than a min read
sunday brunch

Computational Fluid Dynamics

This Week in CFD

Another Friday, another week chock full of CFD, CAE, and CAD news. This week features…

• less than a min read
CFD , Pointwise , Computational Fluid Dynamics , NUMECA , CAD , Computer Aided Design , Omnis

Breakfast Bytes

The Latest MLPerf Results for Inference

Just before the recent Linley Spring Processor Conference 2021, MLPerf released its…

• 3 min read
NVIDIA , mlperf

PCB設計／ICパッケージ設計

ASCENT: Ready-GOで設計スタート！ ライブラリの用意がなくても大丈夫

Allegro® System Captureの概要 はお伝えしたので、今回は設計プロセスの一番最初の部分からお話を始めましょう。 さて、部品はどこにありますか…

• less than a min read
17.4 , 17.4-2019 , Allegro System Capture , japanese blog

カスタムIC／ミックスシグナル

Spectre Tech Tips: 電熱シミュレーションの紹介

集積回路の熱性能を理解することは、回路の誤動作の原因となる過熱を回避するために不可欠でした。集積度が高まるにつれ、オンチップの温度を制限するために、集積回路の消費電力がますます重要になっています…

• less than a min read
Electrothermal simulation , Spectre , japanese blog , Custom IC Design , Legato Reliability

RF Engineering

μWaveRiders: Scripting in the Cadence AWR Design Environment

What are the advantages of using Python over VBA for scripting in the Cadence AWR…

• 3 min read
AWR Design Environment , Python , API , VBA , AWR Microwave Office , scripting , IDE

RF /マイクロ波設計

μWaveRiders:Cadence AWR Design Environmentでのスクリプティング

Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design…

• less than a min read
AWR Design Environment , Python , API , VBA , AWR Microwave Office , japanese blog , scripting , IDE

Breakfast Bytes

ESD Alliance CEO Outlook

Next Tuesday afternoon, May 18, at 2:00pm PDT is the annual CEO Outlook meeting.…

• 1 min read
semi , ceo outlook , esd alliance

Analog/Custom Design

Virtuoso ICADVM20.1 ISR18 and IC6.1.8 ISR18 Now Available

The ICADVM20.1 ISR18 and IC6.1.8 ISR18 production releases are now available for…

• 5 min read
Cadence blogs , ADE Explorer , Virtuoso RF Solution , IC Release Announcement blog , Virtuoso Analog Design Environment , ICADVM20.1 , Clarity 3D Solver , Custom IC , ADE Verifier , Analog IC Design , ADE Assembler

Verification

Introduction to Macros – Answers to Your Questions

Thanks to all the people who attended the webinar Extend the Language! An Introduction…

• 5 min read
Specman , Functional Verification , e , webinar , training bytes , macro debugging , e language , macros

System, PCB, & Package Design 

BoardSurfers: Training Insights: Creating Footprints in Allegro PCB Editor

A footprint is a graphical representation composed of pads used for connecting electronic…

• 5 min read
Footprint , BoardSurfers , symbol editor , PCB Editor , library

Digital Design

Do You Know DFT Violations Can Be Debugged Using Genus GUI? Excited to Explore?

Design for Test (DFT) techniques provide measures to comprehensively test the manufactured…

• less than a min read
scan , DFT , Genus , gui , debug , Digital Implementation , Violations , Synthesis
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