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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
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Blog - Post List

Latest blogs

Breakfast Bytes

GF Silicon Photonics: Fiber Attach Is the Secret Sauce

A lot of constraints in datacenters are fixed even though others are increasing.…

• 5 min read
fiber attach , linley group , linley cloud hardware conference , silicon photonics , GlobalFoundries

Analog/Custom Design

Virtuoso Video Diary: Noise Simulation in Spectre RF Using Improved Pnoise/Hbnoise…

Did you check out the new Pnoise and Hbnoise Choosing Analyses forms in the MMSIM…

• 4 min read
Spectre RF , noise simulation , Virtuoso , Virtuoso Video Diary

Breakfast Bytes

MWC: The Future of Mobile: Part 2

This is the second of a two part post about the future of mobile, long-term dreams…

• 9 min read
softbank , veon , at&t , gsma , Mobile World Congress , ARM

SoC and IP

Memory Trends for Automotive Markets

Remember automobiles from a few years ago? They were pretty simple machines with…

• 4 min read
Design IP , IP , Memory , LPDDR4 , LPDDR , DIP , memory IP , Design IP and Verification IP , memories

Whiteboard Wednesdays

Whiteboard Wednesdays - Eliminate the Memory Bottleneck with Universal Flash Sto…

In this week's Whiteboard Wednesdays video, Ofir Michaeli discusses Universal Flash…

• less than a min read
Whiteboard Wednesdays , UFS

Breakfast Bytes

What's For Breakfast? Video Preview March 13th to 17th 2017

https://youtu.be/ZhpHKzcdVK8 Coming from San Jose City Hall Monday: ESD…

• less than a min read
energy policy , linley group , IoT , DRC , Mobile World Congress , TSMC , linley cloud hardware conference , TSMC Technology Symposium , MWC , Internet of Things , design rule checking , optical networking , esd alliance , networking

Breakfast Bytes

MWC: The Future of Mobile: Part 1

There were two sessions that MWC calls "keynotes", but are actually groups of several…

• 8 min read
softbank , veon , at&t , gsma , Mobile World Congress , ARM

Breakfast Bytes

MWC: Everything is Mobile Now

Every year, Mobile World Congress (MWC) takes place in Barcelona, Spain. Historically…

• 10 min read
Mobile World Congress , un sdg , sustainable development goals , nokia , MWC , netflix , mobile , mdg , strive masiyawa , millennium development goals , africa

Verification

Specman in Xcelium

Just recently Cadence announced the new superb simulator, Xcelium . Just as Specman…

• 5 min read
IEEE 1647 , funtional verification , Specman , Functional Verification , e , e language , Funcional Verification , specman elite , Incisive Enterprise Simulator (IES) , IES , verification , IES-XL

Verification

Portable Stimulus Shines at DVCon

For me, this week was almost entirely consumed with the Design and Verification Conference…

• 4 min read
uvm , prototyping , pswg , Acceleration , Functional Verification , Perspec , System Design and Verification , Palladium , SoC , Emulation , Simulation acceleration , DVcon , Accellera , metric-driven verification , Hardware/software co-verification , portable stimulus , simulation , verification

Breakfast Bytes

Intel's Investor Conference: Now Leading with Datacenter

Intel had its investor day recently. I'm not going to talk about Intel as an investment…

• 7 min read

System, PCB, & Package Design 

Why is Power Integrity Hot (or is it Cool)?

When designing next-generation products, the common theme is "faster, smaller, cheaper…

• 2 min read
Power Integrity , electrical-thermal co-simulation , Sigrity , thermal

Breakfast Bytes

Do You Know What Stingray Is?

If you are my age and grew up in Britain, then Stingray was one of the fore-runners…

• 4 min read
imsi catcher , law enforcement , mobile , stingray

Breakfast Bytes

Litho Physical Analyzer PLUS

Next week it is the SPIE Advanced Lithography Conference (and DVCon, and MWC in Barcelona…

• 3 min read
asml , imec , Virtuoso , Innovus , LPA , lpa plus

Whiteboard Wednesdays

Whiteboard Wednesdays - Simplifying SoC Verification with Interconnect Workbench

In this week’s Whiteboard Wednesdays video, Shin Chan Kang explains how the Cadence…

• less than a min read
Verification IP , Interconnect Workbench , uvm , Whiteboard Wednesdays , VIP , SoC , Shin Chan Kang

Digital Design

Making Hardware Design Great Again in 2017 - Part Deux

In part one of this series, we talked about the role of the hardware designer , specifically…

• 5 min read
High-Level Synthesis , digital implementation , Digital Implementation , HLS

Breakfast Bytes

What's For Breakfast? Video Preview March 6th to 10th 2017

https://youtu.be/ygs0CEZXtAI Coming from Mobile World Congress, Barcelona,…

• less than a min read
gsma , Mobile World Congress , silicon photonics , netflix , mobile carriers , mobile , irps , GlobalFoundries , reliability , formula e

Breakfast Bytes

Protium: Next Generation FPGA Prototyping

FPGA prototyping is a very attractive tool for some aspects of verification. Apart…

• 5 min read
palladium z1 , Protium , FPGA prototyping , xilinx , protium s1 , FPGA

Breakfast Bytes

Xcelium: Parallel Simulation for the Next Decade

This morning, Cadence announced two new products in the verification space: Xcelium…

• 4 min read
SystemVerilog , RTL simulation , Verilog , rocketsim , xcelium , simulation
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