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Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso
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Blog - Post List

Latest blogs

Breakfast Bytes

Lawyers, Guns, and Money: An Evening with EDAC on Patents

Next Thursday, October 29, 2015, the Electronic Design Automation Consortium (EDAC…

• 5 min read
VLSI , US Patent and Trademark Office , USPTOSV , EDAC , patents , patent litigation , Breakfast Bytes

Analog/Custom Design

Virtuosity: Things I Learned in June and July 2015 by Browsing Cadence Online Su…

Cadence Online Support Release Highlights July 2015 Some nice enhancements to…

• 7 min read
Analog Design Environment , ADE XL , Spectre , PVS , Custom IC Design , ICRP , Virtuoso Layout Suite XL

Breakfast Bytes

How Is Google So Good at Recognizing Cats?

Convolutional Neural Networks (CNNs) are a key technique for image recognition. As…

• 3 min read
performance , Low Power , Tensilica , convolutional neural nets , neural networks , CNN , power , neural nets , image recognition , Breakfast Bytes

Analog/Custom Design

Virtuosity: Things I Learned in August and September 2015 by Browsing Cadence Online…

Cadence Online Support Features Setting the Release Preferences for your search…

• 5 min read
AMS , ADE , spectreRF , Liberate , PVS , Custom IC Design , XLME

Digital Design

Performance, Power, Area. It's All You Need to Know—or Is It?

Whether it's in a technical paper, a pundit's article, or a live discussion with…

• 2 min read
High-Level Synthesis , PPA , Stratus , SystemC , HLS

SoC and IP

Lowering Energy Consumption in Always-on IoT Designs

As a lead design engineer on the Tensilica R&D team, Dr. Avinash Lingamneni certainly…

• 5 min read
Low Power , always on , IoT , wearable , Tensilica , mobile

Breakfast Bytes

I've Got My Personal Portable Communications Equipment. But Where's My Hoverboard…

You have probably seen the Back to the Future trilogy. In Back to the Future II Marty…

• 3 min read
electronics , moore's law , hoverboard , Marty McFly , Back to the Future

Whiteboard Wednesdays

Whiteboard Wednesdays—Cadence IP Solution for USB Type-C

In this week’s Whiteboard Wednesdays video, Jacek Duda talks about the components…

• less than a min read
DSP , Whiteboard Wednesdays , IP , DisplayPort , USB , Tensilica , Xtensa , Type-C , multi-protocol

Verification

MIPI CSI-2—What's Cooking with the Most Popular Mobile Camera Interface?

The MIPI CSI-2 (Camera Serial Interface) specification is celebrating its tenth birthday…

• 2 min read
Verification IP , MIPI Alliance , IoT , VIP , MIPI , CSI

Breakfast Bytes

One Connector to Rule Them All: USB Type-C

The original USB connector seems to be the only connector where it is always the…

• 5 min read
USB Type-C , DisplayPort , USB , IP subsystem

Breakfast Bytes

IEEE Elects EDA Professional as President

When I lived in England, newspapers had a tradition of not mentioning other newspapers…

• 4 min read
Karen Bartleson , EDA standards , Electronic design , IEEE

Breakfast Bytes

Weekly News—October 16, 2015

Largest Tech Merger Ever Earlier in the year Avago announced that it was acquiring…

• 2 min read
Intel , Dell , 5nm test chip , imec , EMC , Qualcomm , Breakfast Bytes , Weekly News

Breakfast Bytes

Goldilocks and the Three Ways

The two obvious ways to implement a complex algorithm are to write a large amount…

• 4 min read

Breakfast Bytes

Memory and Storage: the Wall is Coming Down

It was MemCon this week. Three keynotes, three parallel tracks each with four presentations…

• 4 min read
IP , Memory , MemCon , storage , DRAM , flash memory

Breakfast Bytes

Rules for Radicals: Practical Advice for Adopting Formal

This year's Jasper User Group conference finished up with a dose of realism in a…

• 4 min read
Jasper User Group , JUG , formal , PMC Sierra , Imagination , Jasper , broadcom , Qualcomm , Paul's Posts , Formal verification

Whiteboard Wednesdays

Whiteboard Wednesdays—Automotive IP Subsystems

In this week's Whiteboard Wednesdays video, Charles Qi takes a closer look at IP…

• less than a min read
Automotive , Whiteboard Wednesdays , IP , subsystem

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Symbol Editor? 16.6 Has a Couple of New Enhancements…

The Allegro PCB Editor release has a few new capabilities related to symbol pins…

• 1 min read
Allegro GUI , Allegro 16.6 , SPB , PCB Editor , PCB design , Grzenia , Allegro PCB Editor , library , Allegro

SoC and IP

Cadence Ports LPDDR4/DDR4 Combo PHY to TSMC 28HPC to Serve Rapid Adoption in Consumer…

Rapid consumer product revolution continues to be enabled by semiconductor technology…

• 1 min read
DDR4 , LPDDR4 , MemCon , LPDDR , DDR , DDR3 , LPDDR3

Breakfast Bytes

Batterygate, the Scandal that Isn't

If you think power isn’t important then you must have been living under a rock for…

• 5 min read
Apple , Samsung , TSMC , Paul's Posts , power
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