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Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella
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Blog - Post List

Latest blogs

Whiteboard Wednesdays

Whiteboard Wednesdays - Automotive Memory Technologies and Trends: Technology Im…

In this week's Whiteboard Wednesdays video, the last of a three part series, Scott…

• less than a min read
Automotive , memory protocols , Whiteboard Wednesdays , Memory , NAND flash , automotive electronics , memory IP , DRAM , memory models

Breakfast Bytes

Xcelium Simulation on Arm Servers

Paul Otellini RIP Paul Otellini was CEO of Intel from 2005-2013. He died in his…

• 4 min read
ARMv8 , Intel , x86 , cloud , mobile , ARM , microprocessor , datacenter , Breakfast Bytes

Analog/Custom Design

The Art of Analog Design Part 6: Response to Frank’s Question to Part 4

In the comments to blog #4, Frank Wiedmann asked about the correlation between the…

• 3 min read
spectre aps , Virtuoso Variation Option , ADE Explorer , mismatch analysis , Analog Simulation , Monte Carlo analysis , DC Mismatch , Custom IC Design

Breakfast Bytes

Putting the Bad Guys in an Arm Lock

This morning Arm announced their Platform Security Architecture (PSA), a new way…

• 6 min read
security , ARM Techcon , mirai , platform security architecture , psa , ARM , Breakfast Bytes , Techcon

Breakfast Bytes

Education, Occupation, and You: Vishal Kapoor at SJSU

Earlier this week, Jim Hogan hosted the next evening at San Jose State University…

• 8 min read
san jose state university , vishal kapoor , san jose state , cognitive science , cognitive era , sjsu , Breakfast Bytes

Breakfast Bytes

What's For Breakfast? Video Preview October 23rd to 27th 2017

https://youtu.be/-9hc6xBOPFw Coming from SJSU Theater (camera Sean) Monday…

• less than a min read
ARM Techcon , formal , Arteris , mobile , ARM , Formal verification

Breakfast Bytes

Mark Papermaster: Moore's Law Plus

Recently, I wrote about Robert Lang's presentation on Computational Origami . He…

• 4 min read
epyc , has , chiplets , rocm , AMD , 3DIC , 2.5D IC , Breakfast Bytes

Breakfast Bytes

How to Build and Connect a Trillion Things: Arm TechCon Preview

Rob Aitken is digging a bit deeper into what it would really take to connect a trillion…

• 7 min read
security , ARM Techcon , trust , IoT , Internet of Things , ARM , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays - What's Driving Automotive Memory Trends and Technologies…

In this week's Whiteboard Wednesdays, the second in a three-part series, Scott Jacobson…

• less than a min read
Automotive , Whiteboard Wednesdays , automotive electronics , ADAS , memory models

The India Circuit

Have an e-Cracker of a Diwali!

Diwali is finally here! One of India’s most favorite festivals, it is celebrated…

• 2 min read
e-cracker , firecrackers , Cadence India , Diwali , e-pataka

Verification

Munich October 18—Come See SystemC Evolution Day!

Sorry, you missed Oktoberfest (which is mostly in September anyway). But come to…

• 2 min read
Munich , Functional Verification , Accellera , SystemC , event

Breakfast Bytes

The Empire Long Divided Must Unite

Chinese children are familiar with the opening lines of Romance of the Three Kingdoms…

• 6 min read
organization , functional organization , corporate cad cycle , CEO , three envelopes , Breakfast Bytes

Learning and Support

One Click to Know About Your Product on Cadence Support

Like with any new product in market everyone is anxious about knowing all the features…

• 1 min read
COS , New Release , Cadence Online Support , Support , product

Verification

Mediatek Deploys Perspec for SoC Verification of Low Power Management (part 3 of…

Here we conclude the blog series and highlight the results of Mediatek 's use of…

• 1 min read
uvm , Perspec , coherent , perspec system verifier , coherency library , coherency , Accellera , mediatek , ARM , pss , portable stimulus

Breakfast Bytes

Are We There Yet? Metric-Driven Signoff

Are we there yet? All verification suffers from the problem of trying to decide when…

• 4 min read
CDNLive , Metric Driven Verification , ST Microelectronics , MDV , simulation , Breakfast Bytes , vManager , verification

Analog/Custom Design

The Art of Analog Design Part 4: Mismatch Analysis

In Part 3 , we started to explore how to analyze the results of Monte Carlo analysis…

• 3 min read
spectre aps , Analog Design Environment , Virtuoso Variation Option , mismatch analysis , Analog Simulation , Monte Carlo , Custom IC Design

Analog/Custom Design

The Art of Analog Design Part 5: Mismatch Analysis II

In Part 4 of the series, we looked at applying mismatch analysis as a design tool…

• 3 min read
spectre aps , offset voltage , mismatch analysis , Analog Simulation , ADE , Monte Carlo analysis , Strong Arm latch , dynamic comparator

Verification

Teradyne Standardizes on Xcelium Simulator

Today, Cadence announced that Teradyne has adopted the Xcelium™ Parallel Simulator…

• less than a min read
Teradyne , ASIC , press release , xcelium , JasperGold , vManager

Verification

Teradyne "Formally" Adopts JasperGold FPV

CDNLive Boston 2017: Teradyne reveals their success with JasperGold in their presentation…

• 2 min read
Teradyne , FPV , CDNLive , customer success , JasperGold , Formal verification
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