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Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

MBhatnagar
• 3 min read
ucie , Design IP , featured , TSMC , die-to-die

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

Corporate
• 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC
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Blog - Post List

Latest blogs

SoC and IP

Intel X-25M 80GB SSD Performance after 45 days of use: Time ain’t on my side, no…

A member of Overclock.Net going by the handle Kiggold just posted two screen shots…

• less than a min read

SoC and IP

DDR3 power savings may be more important for Embedded Apps than for PCs

A new hands-on article written by Patrick Schmid and Achim Roos just appeared on…

• 2 min read

Verification

Sign Up For Free Verification Sessions -- Only A Few Days Left

Mark your calendar and sign up for the two upcoming free verification sessions sponsored…

• 1 min read
workshops , Specman , Coverage-Driven Verification , EDA , Incisive , e , team specman , Aspect Oriented Programming , MDV , IES-XL

Verification

Software Development Tool Teardown For The Motorola Droid

Lately, device teardowns of consumer electronics have become popular. There are many…

• 4 min read
ADB , GDB , android , QXDM , DDMS , JTAG , ETM , vnc , Monkey , QPST , Systemm Verification

Verification

More Thoughts On How To Choose Between The OVM And The UVM

There has been a lot of on-line discussion since DAC about whether the Universal…

• 2 min read
uvm , OVM , VIP , EDA , Accellera , Mentor

SoC and IP

AnandTech analyzes Crucial C300 SSD with Marvell controller in “The SSD Diaries.…

Anand Lal Shimpi, the man behind the AnandTech.com Web site, has published an extended…

• less than a min read

Verification

Changing the Status Quo in SoC to System Hand-off

As part of EDA360 Cadence is learning how to play a more significant role in the…

• 4 min read
Device Drivers , virtual platforms , Droid

SoC and IP

MemCon 2010 looms (July 28). Huge networking opportunity with big list of attendees…

Memcon 2010 is a little more than two weeks away and although we’ve blogged about…

• 1 min read

SoC and IP

Upgrading Old PCs with SSDs: Where’s the Notion of Balance?

Martin Veitch of the UK’s www.CIO.co.uk online magazine recently wrote a blog that…

• 4 min read

SoC and IP

SSDs in embedded control: cold rolling steel in old European factories, Part 2, now…

Back in May, the Denali Memory Report covered an industrial application for SSDs…

• 1 min read

SoC and IP

Flash Memory Summit looms in August: All things Flash

When we weren’t looking, registration for MemCon zoomed past 500 and it’s still climbing…

• 1 min read

SoC and IP

Virident PCIe SSD delivers 320,000 read IOPS with 24-year service life

Add Virident to the growing list of companies that have introduced SSDs in the form…

• 1 min read

Verification

Why The UVM Is Ready For Production Use Today -- Part 3

This is the final installment of my blog posts based on the three common questions…

• 1 min read
uvm , Verification methodology , OVM , VIP , Accellera VIP TSC

Verification

Duolog Interview At DAC 2010, And The IP Integration Aspect Of EDA360

One virtue of events like DAC is that is provides an open forum for vendors to show…

• less than a min read
Cadence Connections , DAC , uvm , IP , IP-XACT , OVM , EDA360 , Duolog

SoC and IP

Specialty semiconductor foundry TowerJazz licenses “Y-Flash” IP to “leading” digital…

TowerJazz, the specialty semiconductor foundry created by the merger of Tower Semiconductor…

• 2 min read

System, PCB, & Package Design 

What's Good About Via DRCs In Allegro Constraint Manager? It's In SPB16.3!

Current design technologies require extremely tight matching requirements right down…

• 1 min read
PCB , PCB Layout and routing , SPB16.3 , Allegro 16.3 , SPB 16.3 , SPB , PCB Editor , Constraint Manager , via , "PCB design" , PCB design , Allegro PCB Editor

SoC and IP

Will Taiwan Innovation Memory Company (TIMC) become Taiwan’s NAND Flash Inc?

The Taiwan Innovation Memory Company (TIMC) was originally formed as the Taiwan Memory…

• 1 min read

Verification

Why The UVM Is Ready For Production Use Today - Part 2

In my last blog post , I talked about the three most common questions I heard at…

• 1 min read
DAC , uvm , OVM , VIP , EDA

SoC and IP

DRAM vendors look to 40nm process technology to keep DRAM profits flowing next y…

Taiwan Economic News reports that DRAM vendors will be bringing 4x nm process technologies…

• 1 min read
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