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Corporate News

Honda + Cadence = Physical AI (part 1): What Does “Physical AI” Really Mean?

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The more widely the term …

Corporate
• 7 min read
featured , physical ai , HGR , AI , Honda

Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Artificial Intelligence (AI)

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design
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Blog - Post List
Latest blogs

Breakfast Bytes

How's Technology in Israel?

Last week was the last CDNLive of 2017 (cats have nine lives, Cadence had nine CDNlives…

• 10 min read
CDNLive , mellanox , machine learning , Lip-Bu Tan , Anirudh Devgan , eyal wladman , Israel

Learning and Support

Using Search Filters to Improve Search Results on support.cadence.com

While using any search engine, you might often feel there is too much information…

• 1 min read
COS , Search Filters , Search , Cadence Online Support , Cadence Support Portal , Cadence support

Analog/Custom Design

Virtuosity: All New XStream In - The Translation Expressway

A layout design has to go through several iterations and multiple data exchanges…

• 6 min read
xstream in , design data translator , xstream in import , eda import

Breakfast Bytes

Arm Security Manifesto...and Krack

The Internet of Things (IoT) could be a big number...20 billion things... 50 billion…

• 7 min read
security , ARM Techcon , Simon Segars , security manifesto , reaper , wi-fi , mira , ARM , krack

Digital Design

How to Measure and Improve Design Regularity for Better Yield

The following post is an excerpt of “Methodology for Analyzing and Quantifying Design…

• 1 min read
pattern analysis , machine learning , analytics , yield , silicon signoff , design for manufacturing , DFM

Breakfast Bytes

Social Engineering

The biggest weakness in security are the people. It is almost never the encryption…

• 6 min read
security , spearphishing , phishing , social engineering , ARM , ddos , Techcon

System, PCB, & Package Design 

How to Be Sure Your PCB Design Is Protected from ESD Events

One way to determine if your design can withstand an electro-static discharge (ESD…

• 4 min read
Time domain , Speed2000 , FDTD , Sigrity , ESD

Verification

Adding Annotations in Your e Code

If you have had a chance to work with languages like Java or C#, you might have come…

• 6 min read
Specman , e , e language , specman elite , annotations

The India Circuit

The Exciting New Product Launched at CDNLive India 2017

One of the highlights at CDNLive India 2017 that was held in September was the launch…

• 3 min read
memory characterization , CDNLive India , cadence , Vinod Kariat , Cadence Legato , Invecas

Breakfast Bytes

Simon Segars: It's the Security, Stupid

Simon Segars opened the second day of Arm TechCon (or for exhibitors who didn't notice…

• 9 min read
security , ARM Techcon , Simon Segars , softbank , ARM , krack

Breakfast Bytes

What's For Breakfast? Video Preview November 13th to 17th 2017

https://youtu.be/Ar6PcH48DNo Coming from David Intercontinental Tel Aviv (camera…

• less than a min read
ARM Techcon , artificial intelligence , Jasper User Group , deep learning , CDNLive , JUG , Samsung , TSMC , intel custom foundry , caspa , cdnlive israel , ARM , IEDM

Whiteboard Wednesdays

Whiteboard Wednesdays - A Practical Approach to Failure Modes, Effects, and Diagnostic…

In this week's Whiteboard Wednesday, John MacLaren explains the steps required for…

• less than a min read
Automotive , Whiteboard Wednesdays , DDR4 , DDR , DDR3

Breakfast Bytes

October Revolution

Today is the 100th Anniversary of the October Revolution in Russia. But wait, isn…

• 8 min read
st petersburg , Sparc , Russia , moscow , center for sparc technology , leningrad

Digital Design

Functional Correctness—The Forgotten Benefit of HLS

I like to ask questions, because you learn a lot that way. In fact, I did a survey…

• 2 min read
High-Level Synthesis , Digital Implementation , HLS , verification

Breakfast Bytes

Tensilica Can Improve Your Image

Why is image processing so important? To a first order approximation, all data is…

• 5 min read
Vision P5 , Vision P6 , vision c5 dsp , kirin 970 , image processing , Hisilicon , Huawei

Analog/Custom Design

Art of Analog Design Part 7: Mismatch Tuning

In days of future past, we looked at DC mismatch analysis and compared it to Monte…

• 4 min read
mismatch tuning , Monte Carlo analysis , DC Mismatch

Breakfast Bytes

The Book That Changed Everything

Academics have had a big influence on semiconductor design and design automation…

• 7 min read
introduction to vlsi systems , carver mead , lynn conway

Breakfast Bytes

CHIP: College Hire and Internship Program

For some time, Cadence had an informal internship program: if managers wanted to…

• 4 min read
Interns , Cadence Academic Network , recruitment , graduates , hiring

Breakfast Bytes

What's For Breakfast? Video Preview November 6th to 10th 2017

https://youtu.be/P3O79m4r-PM < Coming from the Cadence building 10 lobby (camera…

• less than a min read
security , ARM Techcon , Simon Segars , security manifesto , mobile , Russia , social engineering , ARM
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